[PATCH] D73411: [InstCombine] Process newly inserted instructions in the correct order

[Nikita Popov via Phabricator via llvm-commits]

nikic marked 2 inline comments as done.
nikic added inline comments.


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Comment at: llvm/test/Transforms/InstCombine/div.ll:403
+; CHECK-NEXT:    [[DIV:%.*]] = zext i1 [[TMP1]] to i32
+; CHECK-NEXT:    ret i32 [[DIV]]
 ;
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Here `(a shl nsw 31) sdiv INT_MIN` is folded to `zext ((a shl nsw 31)  == INT_MIN)`. Previously the `zext` was visited first and this was folded to `and`. Now the comparison is visited first, which is folded to `a == -1`. At that point, the zext cannot be folded to `and` anymore, because we've lost information.

I don't think we can really do anything about this, unless we want to drop the equality fold, which I don't think we want. The new IR also doesn't look particularly bad, depending on how the result is going to be used.


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Comment at: llvm/test/Transforms/InstCombine/getelementptr.ll:223
+; CHECK-NEXT:    [[C:%.*]] = icmp eq <2 x i64> [[A_OFFS]], zeroinitializer
 ; CHECK-NEXT:    ret <2 x i1> [[C]]
 ;
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This issue is tracked at https://bugs.llvm.org/show_bug.cgi?id=44588. I got the impression that @spatel is planning to work on this at some point, but if desired I can also look into fixing this regression first.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D73411/new/

https://reviews.llvm.org/D73411