[PATCH] D73214: [MIPS GlobalISel] Select count leading zeros

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 22 10:23:52 PST 2020


arsenm added inline comments.


================
Comment at: llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp:3865
+    return UnableToLegalize;
+
+  Register LoIn = MRI.createGenericVirtualRegister(NarrowTy);
----------------
This assumes that NarrowTy == OrigType/2. This should check that or do something else in that case.
This also won't work with a vector


================
Comment at: llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp:3868
+  Register HiIn = MRI.createGenericVirtualRegister(NarrowTy);
+  MIRBuilder.buildUnmerge({LoIn, HiIn}, MI.getOperand(1));
+
----------------
You can do just buildUnmerge(NarrowTy)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D73214/new/

https://reviews.llvm.org/D73214





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