[PATCH] D73194: [FPEnv][ARM] Handle expansion of strict SETCC with legal condition code

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 22 09:46:18 PST 2020


craig.topper added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:3672
+    // using that condition code. If we have a strict SETCC the condition code
+    // may already be legal, in which case we similarly convert to a non-strict
+    // SETCC with the condition code we already have.
----------------
john.brawn wrote:
> craig.topper wrote:
> > Why is it ok to turn a STRICT node into a non-strict node?
> Well, it's what we're doing already in the case that a STRICT_FSETCCS has a condition code that LegalizeSetCCCondCode can make legal by swapping the operands - or at least I think so from reading the code, the situation where I'm seeing FSETCCS is from the expansion of STRICT_FP_TO_UINT where that doesn't happen so I don't know of a way to check if that is the case.
> 
> If converting to non-strict isn't right, then what should be done instead?
That does look like a bug, but probably not tested.

The ARM target will need to replicate whatever it does for floating point ISD::SETCC to also handle ISD::STRICT_FSETCC/FSETCCS. That may require fixing the SELECT_CC FIXME below if ARM uses that. You may need new STRICT_ target specific nodes that have chain input and output. And new isel patterns to match them.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D73194/new/

https://reviews.llvm.org/D73194





More information about the llvm-commits mailing list