[PATCH] D73117: [ARM] Mark MVE loads/store as not having side effects

[Simon Tatham via Phabricator via llvm-commits]

simon_tatham added a comment.

> why do we attach SideEffects to patterns and not instruction descriptions anyway?

I think the point is that a lot of patterns //naturally// come with information that indicates whether they have various kinds of side effect. If you write a pattern that describes what your instruction does in terms of standard LLVM IR (or rather SDNodes, but the principle's the same), then LLVM can work out for itself (based on its knowledge of those SDNodes' semantics) whether the instruction can load memory, store memory, or do anything else potentially weird, and therefore the Tablegen backend propagates that information from the pattern into the instruction to save you having to write it down //again// in the instruction definition.

So you only need to manually fill in flags like this if Tablegen can't work it out automatically – if your instruction is selected by C++ isel code, or generated from a target-specific SDNode that Tablegen doesn't know enough about, or inserted post-isel by some totally other phase, etc.

We've been gradually adding isel patterns for a lot of MVE instructions over the past few months, and one of the effects has been that the hasSideEffects flags have been turning from `?` into well defined values.


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  https://reviews.llvm.org/D73117/new/

https://reviews.llvm.org/D73117