[PATCH] D73071: [X86][test] Add tests for -fpatchable-function-entry=N,M (where M>0) and its interaction with -fcf-protection=branch

[Fangrui Song via Phabricator via llvm-commits]

MaskRay updated this revision to Diff 239394.
MaskRay retitled this revision from "[X86] Support -fpatchable-function-entry=N,M where M>0" to "[X86][test] Add tests for -fpatchable-function-entry=N,M (where M>0) and its interaction with -fcf-protection=branch".
MaskRay added a comment.

Delete code change.
This is a pure test patch now.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D73071/new/

https://reviews.llvm.org/D73071

Files:
  llvm/test/CodeGen/X86/patchable-function-entry-ibt.ll
  llvm/test/CodeGen/X86/patchable-function-entry.ll


Index: llvm/test/CodeGen/X86/patchable-function-entry.ll
===================================================================
--- llvm/test/CodeGen/X86/patchable-function-entry.ll
+++ llvm/test/CodeGen/X86/patchable-function-entry.ll
@@ -67,3 +67,29 @@
 ; 64-NEXT:     .quad .Lfunc_begin4
   ret void
 }
+
+;; -fpatchable-function-entry=3,2
+;; "patchable-function-prefix" emits data before the function entry label.
+;; We emit 1-byte NOPs before the function entry, so that with a partial patch,
+;; the remaining instructions do not need to be modified.
+define void @f3_2() "patchable-function-entry"="1" "patchable-function-prefix"="2" {
+; CHECK-LABEL: .type f3_2, at function
+; CHECK-NEXT: .Ltmp0: # @f3_2
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  nop
+; CHECK-NEXT: f3_2:
+; CHECK:      # %bb.0:
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  ret
+;; .size does not include the prefix.
+; CHECK:      .Lfunc_end5:
+; CHECK-NEXT: .size f3_2, .Lfunc_end5-f3_2
+; NOFSECT     .section __patchable_function_entries,"awo", at progbits,f0,unique,0
+; FSECT:      .section __patchable_function_entries,"awo", at progbits,f3_2,unique,4
+; 32:         .p2align 2
+; 32-NEXT:    .long .Ltmp0
+; 64:         .p2align 3
+; 64-NEXT:    .quad .Ltmp0
+  %frame = alloca i8, i32 16
+  ret void
+}
Index: llvm/test/CodeGen/X86/patchable-function-entry-ibt.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/X86/patchable-function-entry-ibt.ll
@@ -0,0 +1,48 @@
+; RUN: llc -mtriple=x86_64 %s -o - | FileCheck --check-prefixes=CHECK %s
+
+;; -fpatchable-function-entry=0 -fcf-protection=branch
+define void @f0() "patchable-function-entry"="0" "branch-target-enforcement" {
+; CHECK-LABEL: f0:
+; CHECK-NEXT: .Lfunc_begin0:
+; CHECK:      # %bb.0:
+; CHECK-NEXT:  endbr64
+; CHECK-NEXT:  retq
+; CHECK-NOT:  .section __patchable_function_entries
+  ret void
+}
+
+;; -fpatchable-function-entry=1 -fcf-protection=branch
+define void @f1() "patchable-function-entry"="1" {
+; CHECK-LABEL: f1:
+; CHECK-NEXT: .Lfunc_begin1:
+; CHECK:       endbr64
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  retq
+; CHECK:      .section __patchable_function_entries,"awo", at progbits,f1,unique,0
+; CHECK-NEXT: .p2align 3
+; CHECK-NEXT: .quad .Lfunc_begin1
+  ret void
+}
+
+;; -fpatchable-function-entry=2,1 -mbranch-protection=bti
+define void @f2_1() "patchable-function-entry"="1" "patchable-function-prefix"="1" {
+; CHECK-LABEL: .type f2_1, at function
+; CHECK-NEXT: .Ltmp0:
+; CHECK-NEXT:  nop
+; CHECK-NEXT: f2_1:
+; CHECK-NEXT: .Lfunc_begin2:
+; CHECK:      # %bb.0:
+; CHECK-NEXT:  endbr64
+; CHECK-NEXT:  nop
+; CHECK-NEXT:  retq
+; CHECK:      .Lfunc_end2:
+; CHECK-NEXT: .size f2_1, .Lfunc_end2-f2_1
+; CHECK:      .section __patchable_function_entries,"awo", at progbits,f1,unique,0
+; CHECK-NEXT: .p2align 3
+; CHECK-NEXT: .quad .Ltmp0
+  ret void
+}
+
+!llvm.module.flags = !{!0}
+
+!0 = !{i32 4, !"cf-protection-branch", i32 1}


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