[llvm] 885260d - [GlobalISel] Don't arbitrarily limit a mask to 64 bits

Jay Foad via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 16 08:16:09 PST 2020


Author: Jay Foad
Date: 2020-01-16T16:13:20Z
New Revision: 885260d5d80549a3a4a686093dc38cde0ea0b3c2

URL: https://github.com/llvm/llvm-project/commit/885260d5d80549a3a4a686093dc38cde0ea0b3c2
DIFF: https://github.com/llvm/llvm-project/commit/885260d5d80549a3a4a686093dc38cde0ea0b3c2.diff

LOG: [GlobalISel] Don't arbitrarily limit a mask to 64 bits

Reviewers: arsenm

Subscribers: wdng, rovka, hiraditya, volkan, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72853

Added: 
    

Modified: 
    llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index 00eaa67635fa..f85dd76dbbaa 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -1436,9 +1436,10 @@ LegalizerHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy) {
     // Do the arithmetic in the larger type.
     auto NewOp = MIRBuilder.buildInstr(Opcode, {WideTy}, {LHSZext, RHSZext});
     LLT OrigTy = MRI.getType(MI.getOperand(0).getReg());
-    APInt Mask = APInt::getAllOnesValue(OrigTy.getSizeInBits());
+    APInt Mask =
+        APInt::getLowBitsSet(WideTy.getSizeInBits(), OrigTy.getSizeInBits());
     auto AndOp = MIRBuilder.buildAnd(
-        WideTy, NewOp, MIRBuilder.buildConstant(WideTy, Mask.getZExtValue()));
+        WideTy, NewOp, MIRBuilder.buildConstant(WideTy, Mask));
     // There is no overflow if the AndOp is the same as NewOp.
     MIRBuilder.buildICmp(CmpInst::ICMP_NE, MI.getOperand(1), NewOp, AndOp);
     // Now trunc the NewOp to the original result.


        


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