[PATCH] D57059: [SLP] Initial support for the vectorization of the non-power-of-2 vectors.

[Alexey Bataev via Phabricator via llvm-commits]

ABataev marked an inline comment as done.
ABataev added inline comments.


================
Comment at: llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp:2761
+        if (Diff && ((NumberOfInstructions < VL.size() &&
+                      Diff->getAPInt().ule((VL.size() - 1) * Size)) ||
+                     (NumberOfInstructions == VL.size() &&
----------------
vdmitrie wrote:
> This check is not quite complete.
> If we for example have following scalars set (VL)
> 0:  load  i32 from p[0]
> 1:  load i32 from p[2]
> 3: undef i32
> 4: undef i32
> (note that p[1] is not loaded)
> 
> Pointers difference is 8, number of instructions is 2 and VL size is 4:
> thus 8 <= (4 -1)*4 is true but pointers actually not loaded consecutively (although It is vectorizeable via masked load+shuffle but support seems not implemented yet). Similar issue exists for store.
> 
Hmm, see lines 4574-4600 (masked load + shuffle) and 4643-4678 (shuffle + masked store)


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https://reviews.llvm.org/D57059