[PATCH] D71194: [ARM] MVE VLDn addressing modes

[Dave Green via Phabricator via llvm-commits]

dmgreen marked an inline comment as done.
dmgreen added inline comments.


================
Comment at: llvm/lib/Target/ARM/ARMISelLowering.cpp:13156
+      isLoadOp = false;
+      break;
+    }
----------------
simon_tatham wrote:
> If I understand this part right, it's trying to arrange that the IR intrinsics for vld2/vst2 are turned into something that can be writeback-optimized. But there don't seem to be many tests of that part – I saw one test that had a `vld2q` intrinsic call, but no tests of vld4, or stores.
Oh yeah, I can add some of those.

The way these work at the moment is that we convert the code in these mve-vst2.ll tests (the shuffle and the loads) into the mve intrinsics in the InterleaveAccessPass and lowerInterleavedLoad. So these tests are testing the, just not directly.

I can add some more direct tests too. That sounds like a good idea.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71194/new/

https://reviews.llvm.org/D71194