[PATCH] D72706: [MachineScheduler] Reduce reordering due to mem op clustering
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 14 11:23:21 PST 2020
This revision was automatically updated to reflect the committed changes.
Closed by commit rGb777e551f044: [MachineScheduler] Reduce reordering due to mem op clustering (authored by foad).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D72706/new/
https://reviews.llvm.org/D72706
Files:
llvm/lib/CodeGen/MachineScheduler.cpp
llvm/test/CodeGen/AArch64/aarch64-stp-cluster.ll
llvm/test/CodeGen/AArch64/arm64-ldp-cluster.ll
llvm/test/CodeGen/AArch64/arm64-memset-inline.ll
llvm/test/CodeGen/AArch64/expand-select.ll
llvm/test/CodeGen/AArch64/global-merge-group-by-use.ll
llvm/test/CodeGen/AArch64/machine-scheduler.mir
llvm/test/CodeGen/AMDGPU/bitcast-constant-to-vector.ll
llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll
llvm/test/CodeGen/AMDGPU/call-argument-types.ll
llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
llvm/test/CodeGen/AMDGPU/ds_read2.ll
llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
llvm/test/CodeGen/AMDGPU/insert-subvector-unused-scratch.ll
llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
llvm/test/CodeGen/AMDGPU/kernel-args.ll
llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
llvm/test/CodeGen/AMDGPU/max.i16.ll
llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
llvm/test/CodeGen/AMDGPU/shift-i128.ll
llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
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