[PATCH] D72225: Align branches within 32-Byte boundary(Prefix padding)

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp:436
+
+  // The number of prefixes is limted by AlignMaxPrefixSize for some peformance
+  // reasons, so we need to compute how many prefixes can be added.
----------------
limted->limited
peformance->performance


================
Comment at: llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp:458
+      // CS(0x2e), SS(0x36), DS(0x3e), ES(0x26), FS(0x64), GS(0x65)
+      if (Byte == 0x2e || Byte == 0x36 || Byte == 0x3e || Byte == 0x26 ||
+          Byte == 0x64 || Byte == 0x65)
----------------
Your emitPrefix function includes the 2 byte and 3 byte VEX prefixes, the 4 byte EVEX prefix, and the 3 byte XOP prefix. The bytes after the leading byte of those prefixes can be any byte value and does not indicate a segment value.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D72225/new/

https://reviews.llvm.org/D72225