[PATCH] D72639: AMDGPU/GlobalISel: Fix select of <3 x s16>/ <4 x s16> insert/extract

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: nhaehnle, kerbowa.
Herald added subscribers: Petar.Avramovic, hiraditya, t-tye, tpr, dstuttard, rovka, yaxunl, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.

There are 3 element f16 format loads and stores, so we need to handle
<3 x s16> as a legal type.


https://reviews.llvm.org/D72639

Files:
  llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert.mir

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