[PATCH] D71779: [AArch64][SVE] Add patterns for signed and unsigned min/max instructions

[Danilo Carvalho Grael via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG2d7e757a836a: [AArch64][SVE] Add patterns for some arith SVE instructions. (authored by dancgr).

Changed prior to commit:
  https://reviews.llvm.org/D71779?vs=236599&id=237696#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71779/new/

https://reviews.llvm.org/D71779

Files:
  llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/test/CodeGen/AArch64/sve-int-arith-imm.ll

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