[PATCH] D70286: Merge memtag instructions with adjacent stack slots.

Evgenii Stepanov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 6 15:12:58 PST 2020


eugenis added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64FrameLowering.cpp:2854
+    MachineInstr *MI = TS.MI;
+    if (MI->memoperands_empty()) {
+      MemRefs.clear();
----------------
ostannard wrote:
> Why do we want to return an empty list if any one input instruction doesn't have a memoperand?
Added a comment. No memoperand wins over any memoperand.
See MachineInstr::mayAlias, MachineInstr::cloneMergedMemRefs.



================
Comment at: llvm/lib/Target/AArch64/AArch64FrameLowering.cpp:2882
+
+  const int kSetTagLoopThreshold = 176;
+  if (Size < kSetTagLoopThreshold) {
----------------
ostannard wrote:
> Where does the number 176 come from?
It's approximately the breaking point between loop and unrolled STG sequence in terms of code size. Anything <176 bytes can be tagged with 5 instructions or less; the loop body itself is 3, but it usually needs one or two instructions to prepare the counter and the base pointer.

We can tune it for performance later when the hardware is available.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70286/new/

https://reviews.llvm.org/D70286





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