[PATCH] D72187: AMDGPU: Prepare to use scalar register indexing

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: rampitec, nhaehnle.
Herald added subscribers: arphaman, hiraditya, t-tye, tpr, dstuttard, yaxunl, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.
arsenm added a parent revision: D72185: AMDGPU: Partially merge indirect register write handling.

Define pseudos mirroring the the VGPR indexing ones, and adjust the
operands in the s_movrel* instructions to avoid the result def.


https://reviews.llvm.org/D72187

Files:
  llvm/lib/Target/AMDGPU/SIInstructions.td
  llvm/lib/Target/AMDGPU/SOPInstructions.td
  llvm/lib/Target/AMDGPU/VOP1Instructions.td

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