[PATCH] D71287: [PowerPC] Use fcti[dw] instructions in additional cases

Colin Samples via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 2 12:21:48 PST 2020


vddvss updated this revision to Diff 235917.
vddvss retitled this revision from "[PowerPC] [RFC] exploit fcti[dw] instructions for lrint and llrint" to "[PowerPC] Use fcti[dw] instructions in additional cases".
vddvss edited the summary of this revision.
vddvss added a comment.

Updated differential. This moves the actions to near where `D69949` had them, guards them with `TM.Options.UnsafeFPMath` (I can't believe I didn't do that in the first patch), and changes tests accordingly.

That said, the `fc[tf]i*` instructions go back to at least ISA 2.02, but the `PPC.td` file only lists POWER7 and later as having fpcvt instructions, so right now this patch would only add the instructions for POWER7, which has fpcvt but not direct move. I think determining what processors support the instructions would require a bit of archaeology, so I'm wondering if we should even bother with this?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71287/new/

https://reviews.llvm.org/D71287

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/lib/Target/PowerPC/PPCInstr64Bit.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/test/CodeGen/PowerPC/llrint-conv.ll
  llvm/test/CodeGen/PowerPC/lrint-conv.ll

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