[llvm] aa17d31 - [X86] Remove FP0-6 operands from call instructions in FPStackifier pass. Only count defs as returns.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2020-01-02T11:10:51-08:00
New Revision: aa17d31edb00c66461093b5a7cd2f4a35dc143e9

URL: https://github.com/llvm/llvm-project/commit/aa17d31edb00c66461093b5a7cd2f4a35dc143e9
DIFF: https://github.com/llvm/llvm-project/commit/aa17d31edb00c66461093b5a7cd2f4a35dc143e9.diff

LOG: [X86] Remove FP0-6 operands from call instructions in FPStackifier pass. Only count defs as returns.

All FP0-6 operands should be removed by the FP stackifier. By
removing these we fix the machine verifier error in PR39437.

I've also made it so that only defs are counted for STReturns
which removes what I think were extra stack cleanup instructions.

And I've removed the regcall assert because it was checking the
attributes of the caller, but here we're concerned with the
attributes of the callee. But I don't know how to get that
information from this level.

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86FloatingPoint.cpp
    llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86FloatingPoint.cpp b/llvm/lib/Target/X86/X86FloatingPoint.cpp
index 1e18a6769c94..d7f4eba62995 100644
--- a/llvm/lib/Target/X86/X86FloatingPoint.cpp
+++ b/llvm/lib/Target/X86/X86FloatingPoint.cpp
@@ -976,22 +976,24 @@ void FPS::shuffleStackTop(const unsigned char *FixStack,
 //===----------------------------------------------------------------------===//
 
 void FPS::handleCall(MachineBasicBlock::iterator &I) {
+  MachineInstr &MI = *I;
   unsigned STReturns = 0;
   const MachineFunction* MF = I->getParent()->getParent();
 
-  for (const auto &MO : I->operands()) {
-    if (!MO.isReg())
+  for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
+    MachineOperand &Op = MI.getOperand(i);
+    if (!Op.isReg() || Op.getReg() < X86::FP0 || Op.getReg() > X86::FP6)
       continue;
 
-    unsigned R = MO.getReg() - X86::FP0;
+    assert(Op.isImplicit() && "Expected implicit def/use");
 
-    if (R < 8) {
-      if (MF->getFunction().getCallingConv() != CallingConv::X86_RegCall) {
-        assert(MO.isDef() && MO.isImplicit());
-      }
+    if (Op.isDef())
+      STReturns |= 1 << getFPReg(Op);
 
-      STReturns |= 1 << R;
-    }
+    // Remove the operand so that later passes don't see it.
+    MI.RemoveOperand(i);
+    --i;
+    --e;
   }
 
   unsigned N = countTrailingOnes(STReturns);

diff  --git a/llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll b/llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
index ef3e3398d816..e832e42fea18 100644
--- a/llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
+++ b/llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
@@ -1,8 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; FIXME: Fix machine verifier issues and remove -verify-machineinstrs=0. PR39437.
-; RUN: llc < %s -mtriple=i386-pc-win32       -mattr=+avx512f -mattr=+avx512vl -mattr=+avx512bw -mattr=+avx512dq -verify-machineinstrs=0  | FileCheck %s --check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-win32        -mattr=+avx512f -mattr=+avx512vl -mattr=+avx512bw -mattr=+avx512dq -verify-machineinstrs=0  | FileCheck %s --check-prefix=WIN64
-; RUN: llc < %s -mtriple=x86_64-linux-gnu    -mattr=+avx512f -mattr=+avx512vl -mattr=+avx512bw -mattr=+avx512dq -verify-machineinstrs=0  | FileCheck %s --check-prefix=LINUXOSX64
+; RUN: llc < %s -mtriple=i386-pc-win32       -mattr=+avx512f -mattr=+avx512vl -mattr=+avx512bw -mattr=+avx512dq -verify-machineinstrs  | FileCheck %s --check-prefix=X32
+; RUN: llc < %s -mtriple=x86_64-win32        -mattr=+avx512f -mattr=+avx512vl -mattr=+avx512bw -mattr=+avx512dq -verify-machineinstrs  | FileCheck %s --check-prefix=WIN64
+; RUN: llc < %s -mtriple=x86_64-linux-gnu    -mattr=+avx512f -mattr=+avx512vl -mattr=+avx512bw -mattr=+avx512dq -verify-machineinstrs  | FileCheck %s --check-prefix=LINUXOSX64
 
 ; Test regcall when receiving/returning i1
 define x86_regcallcc i1 @test_argReti1(i1 %a)  {
@@ -604,7 +603,6 @@ define x86_regcallcc double @test_CallargParamf80(x86_fp80 %a)  {
 ; X32-NEXT:    fadd %st, %st(0)
 ; X32-NEXT:    calll _test_argParamf80
 ; X32-NEXT:    vaddsd %xmm0, %xmm0, %xmm0
-; X32-NEXT:    fstp %st(0)
 ; X32-NEXT:    popl %esp
 ; X32-NEXT:    retl
 ;
@@ -616,7 +614,6 @@ define x86_regcallcc double @test_CallargParamf80(x86_fp80 %a)  {
 ; WIN64-NEXT:    fadd %st, %st(0)
 ; WIN64-NEXT:    callq test_argParamf80
 ; WIN64-NEXT:    vaddsd %xmm0, %xmm0, %xmm0
-; WIN64-NEXT:    fstp %st(0)
 ; WIN64-NEXT:    popq %rsp
 ; WIN64-NEXT:    retq
 ; WIN64-NEXT:    .seh_handlerdata
@@ -631,7 +628,6 @@ define x86_regcallcc double @test_CallargParamf80(x86_fp80 %a)  {
 ; LINUXOSX64-NEXT:    fadd %st, %st(0)
 ; LINUXOSX64-NEXT:    callq test_argParamf80
 ; LINUXOSX64-NEXT:    vaddsd %xmm0, %xmm0, %xmm0
-; LINUXOSX64-NEXT:    fstp %st(0)
 ; LINUXOSX64-NEXT:    popq %rsp
 ; LINUXOSX64-NEXT:    .cfi_def_cfa_offset 8
 ; LINUXOSX64-NEXT:    retq