[PATCH] D72031: [Scheduling] Create the missing dependency edges for store cluster

[qshanz via Phabricator via llvm-commits]

steven.zhang marked an inline comment as done.
steven.zhang added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll:339
 
-; GCN: s_waitcnt vmcnt(0)
+; GCN: s_waitcnt vmcnt(3)
 ; GCN-DAG: buffer_store_dword [[LOAD4]], off, s[0:3], s32 offset:16
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This case has some deg as it generates more instructions. But the output of the scheduler is as expected.  An issue of the later pass ?


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https://reviews.llvm.org/D72031