[llvm] dac98a2 - [RegisterClassInfo] Use SmallVector::assign instead of resize to make sure we erase previous contents from all entries of the vector.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2020-01-01T18:53:12-08:00
New Revision: dac98a22052eac66295ce443eed20e21bf37d28d

URL: https://github.com/llvm/llvm-project/commit/dac98a22052eac66295ce443eed20e21bf37d28d
DIFF: https://github.com/llvm/llvm-project/commit/dac98a22052eac66295ce443eed20e21bf37d28d.diff

LOG: [RegisterClassInfo] Use SmallVector::assign instead of resize to make sure we erase previous contents from all entries of the vector.

resize only writes to elements that get added. Any elements that
already existed maintain their previous value. In this case we're
trying to erase cached information so we should use assign which
will write to every element.

Found while trying to add new tests to an existing X86 test and
 noticed register allocation changing in other functions.

Added: 
    

Modified: 
    llvm/lib/CodeGen/RegisterClassInfo.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/RegisterClassInfo.cpp b/llvm/lib/CodeGen/RegisterClassInfo.cpp
index 530e0cccf1d4..bdfb2baa716e 100644
--- a/llvm/lib/CodeGen/RegisterClassInfo.cpp
+++ b/llvm/lib/CodeGen/RegisterClassInfo.cpp
@@ -59,7 +59,7 @@ void RegisterClassInfo::runOnMachineFunction(const MachineFunction &mf) {
   if (Update || CSR != CalleeSavedRegs) {
     // Build a CSRAlias map. Every CSR alias saves the last
     // overlapping CSR.
-    CalleeSavedAliases.resize(TRI->getNumRegs(), 0);
+    CalleeSavedAliases.assign(TRI->getNumRegs(), 0);
     for (const MCPhysReg *I = CSR; *I; ++I)
       for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI)
         CalleeSavedAliases[*AI] = *I;