[llvm] e6bdecf - [AArch64] add test for fsub+fneg; NFC

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2019-12-31T10:25:41-05:00
New Revision: e6bdecf1cd6b75222ef094371a514026d8aa0afa

URL: https://github.com/llvm/llvm-project/commit/e6bdecf1cd6b75222ef094371a514026d8aa0afa
DIFF: https://github.com/llvm/llvm-project/commit/e6bdecf1cd6b75222ef094371a514026d8aa0afa.diff

LOG: [AArch64] add test for fsub+fneg; NFC

D72015 proposes to restrict the current behavior.

Added: 
    

Modified: 
    llvm/test/CodeGen/AArch64/arm64-fp.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/AArch64/arm64-fp.ll b/llvm/test/CodeGen/AArch64/arm64-fp.ll
index 683177a8d481..cf8b90de130b 100644
--- a/llvm/test/CodeGen/AArch64/arm64-fp.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-fp.ll
@@ -34,3 +34,19 @@ define double @negation_propagation(double* %arg, double %arg1, double %arg2) {
   %t18 = fadd double %t16, %t7
   ret double %t18
 }
+
+define { double, double } @testfn(double %x, double %y) #0 {
+; CHECK-LABEL: testfn:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    fsub d2, d0, d1
+; CHECK-NEXT:    fsub d1, d1, d0
+; CHECK-NEXT:    mov v0.16b, v2.16b
+; CHECK-NEXT:    ret
+  %sub = fsub fast double %x, %y
+  %neg = fneg fast double %sub
+  %r0 = insertvalue { double, double } undef, double %sub, 0
+  %r1 = insertvalue { double, double } %r0, double %neg, 1
+  ret { double, double } %r1
+}
+
+attributes #0 = { "no-signed-zeros-fp-math"="true" }