[llvm] e8c5600 - [PowerPC][LoopVectorize]Add floating point reg usage test

[Jinsong Ji via llvm-commits]

Author: Jinsong Ji
Date: 2019-12-27T20:37:23Z
New Revision: e8c5600de8b43b2ac22a5aab6ce51e3810f8a4a6

URL: https://github.com/llvm/llvm-project/commit/e8c5600de8b43b2ac22a5aab6ce51e3810f8a4a6
DIFF: https://github.com/llvm/llvm-project/commit/e8c5600de8b43b2ac22a5aab6ce51e3810f8a4a6.diff

LOG: [PowerPC][LoopVectorize]Add floating point reg usage test

Copied two tests from x86 to test floating point reg usage.

Added: 
    

Modified: 
    llvm/test/Transforms/LoopVectorize/PowerPC/reg-usage.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/LoopVectorize/PowerPC/reg-usage.ll b/llvm/test/Transforms/LoopVectorize/PowerPC/reg-usage.ll
index 55bb7c5c7767..a08d111c4d48 100644
--- a/llvm/test/Transforms/LoopVectorize/PowerPC/reg-usage.ll
+++ b/llvm/test/Transforms/LoopVectorize/PowerPC/reg-usage.ll
@@ -127,3 +127,94 @@ for.body:                                         ; preds = %for.body, %entry
 for.end:                                          ; preds = %for.body
   ret void
 }
+
+define float @float_(float* nocapture readonly %a, float* nocapture readonly %b, i32 %n) {
+;CHECK-LABEL: float_
+;CHECK: LV(REG): VF = 1
+;CHECK: LV(REG): Found max usage: 2 item
+;CHECK-NEXT: LV(REG): RegisterClass: PPC::GPRRC, 2 registers
+;CHECK-NEXT: LV(REG): RegisterClass: PPC::VSXRC, 3 registers
+;CHECK: LV(REG): Found invariant usage: 1 item
+;CHECK-NEXT: LV(REG): RegisterClass: PPC::GPRRC, 1 registers
+
+entry:
+  %cmp = icmp sgt i32 %n, 0
+  br i1 %cmp, label %preheader, label %for.end
+
+preheader:
+  %t0 = sext i32 %n to i64
+  br label %for
+
+for:
+  %indvars.iv = phi i64 [ 0, %preheader ], [ %indvars.iv.next, %for ]
+  %s.02 = phi float [ 0.0, %preheader ], [ %add4, %for ]
+  %arrayidx = getelementptr inbounds float, float* %a, i64 %indvars.iv
+  %t1 = load float, float* %arrayidx, align 4
+  %arrayidx3 = getelementptr inbounds float, float* %b, i64 %indvars.iv
+  %t2 = load float, float* %arrayidx3, align 4
+  %add = fadd fast float %t1, %s.02
+  %add4 = fadd fast float %add, %t2
+  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 32
+  %cmp1 = icmp slt i64 %indvars.iv.next, %t0
+  br i1 %cmp1, label %for, label %loopexit
+
+loopexit:
+  %add4.lcssa = phi float [ %add4, %for ]
+  br label %for.end
+
+for.end:
+  %s.0.lcssa = phi float [ 0.0, %entry ], [ %add4.lcssa, %loopexit ]
+  ret float %s.0.lcssa
+}
+
+
+define void @double_(double* nocapture %A, i32 %n) nounwind uwtable ssp {
+;CHECK-LABEL: double_
+;CHECK-PWR8: LV(REG): VF = 2
+;CHECK-PWR8: LV(REG): Found max usage: 2 item
+;CHECK-PWR8-NEXT: LV(REG): RegisterClass: PPC::GPRRC, 2 registers
+;CHECK-PWR8-NEXT: LV(REG): RegisterClass: PPC::VSXRC, 5 registers
+;CHECK-PWR8: LV(REG): Found invariant usage: 1 item
+;CHECK-PWR8-NEXT: LV(REG): RegisterClass: PPC::VSXRC, 1 registers
+
+;CHECK-PWR9: LV(REG): VF = 1
+;CHECK-PWR9: LV(REG): Found max usage: 1 item
+;CHECK-PWR9-NEXT: LV(REG): RegisterClass: PPC::GPRRC, 7 registers
+;CHECK-PWR9: LV(REG): Found invariant usage: 1 item
+;CHECK-PWR9-NEXT: LV(REG): RegisterClass: PPC::GPRRC, 1 registers
+
+  %1 = sext i32 %n to i64
+  br label %2
+
+; <label>:2                                       ; preds = %2, %0
+  %indvars.iv = phi i64 [ %indvars.iv.next, %2 ], [ %1, %0 ]
+  %3 = getelementptr inbounds double, double* %A, i64 %indvars.iv
+  %4 = load double, double* %3, align 8
+  %5 = fadd double %4, 3.000000e+00
+  %6 = fmul double %4, 2.000000e+00
+  %7 = fadd double %5, %6
+  %8 = fadd double %7, 2.000000e+00
+  %9 = fmul double %8, 5.000000e-01
+  %10 = fadd double %6, %9
+  %11 = fsub double %10, %5
+  %12 = fadd double %4, %11
+  %13 = fdiv double %8, %12
+  %14 = fmul double %13, %8
+  %15 = fmul double %6, %14
+  %16 = fmul double %5, %15
+  %17 = fadd double %16, -3.000000e+00
+  %18 = fsub double %4, %5
+  %19 = fadd double %6, %18
+  %20 = fadd double %13, %19
+  %21 = fadd double %20, %17
+  %22 = fadd double %21, 3.000000e+00
+  %23 = fmul double %4, %22
+  store double %23, double* %3, align 8
+  %indvars.iv.next = add i64 %indvars.iv, -1
+  %24 = trunc i64 %indvars.iv to i32
+  %25 = icmp eq i32 %24, 0
+  br i1 %25, label %26, label %2
+
+; <label>:26                                      ; preds = %2
+  ret void
+}