[PATCH] D71828: [InstCombine] Convert vector store to scalar store if only one element updated

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 23 05:53:04 PST 2019


spatel requested changes to this revision.
spatel added a comment.
This revision now requires changes to proceed.

InstCombine has some minimal load/store transforms, so this might be ok to add here, but InstCombine is probably not a pass that should try to do anything more complicated with memory ops.

This patch has the same requirements that were requested here:
https://reviews.llvm.org/D70223#1755719
...but it does not implement those.

In other words, the following tests will be miscompiled (and so they should be added to trunk independently before this patch tries to go any further):

  define void @insert_store_addr(<16 x i8>* %p, <16 x i8>* %q, i8 %s) {
    %ld = load <16 x i8>, <16 x i8>* %p
    %ins = insertelement <16 x i8> %ld, i8 %s, i32 3
    store <16 x i8> %ins, <16 x i8>* %q ; store to different address
    ret void
  }
  
  define void @insert_store_mem_mod(<16 x i8>* %p, <16 x i8>* %q, i8 %s) {
    %ld = load <16 x i8>, <16 x i8>* %p
    store <16 x i8> zeroinitializer, <16 x i8>* %q ; do pointers alias?
    %ins = insertelement <16 x i8> %ld, i8 %s, i32 3
    store <16 x i8> %ins, <16 x i8>* %p
    ret void
  }


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71828/new/

https://reviews.llvm.org/D71828





More information about the llvm-commits mailing list