[PATCH] D71893: [PowerPC] Exploit the rldicl + rldicr when "and" with constant

[qshanz via Phabricator via llvm-commits]

steven.zhang created this revision.
steven.zhang added reviewers: jsji, nemanjai, shchenz, hfinkel, PowerPC.
Herald added subscribers: wuzish, kbarton, hiraditya.
Herald added a project: LLVM.

If it is "and" with constant, for some special pattern, we could use the rotate and instructions instead of the "andi." which requires us to generate the mask using several instructions. i.e. If the mask looks like this. That is, it has two groups of ones, and either the number of leading zeroes or trailing zeroes is zero.

  //     MB  MB2    ME2    ME      
  // +----------------------+ 
  // |0001111100000011111111| 
  // +----------------------+ 
  //  0          32        64 

We could optimize it as follows:

1. Rotate left MB2 + 1 bits and then, clear the bits (MB2, ME2)

      MB  MB2    ME2    ME        MB  MB2    ME2    ME
  +----------------------+    +----------------------+
  |1111111111111111111111| -> |0000001111111111111111+
  +----------------------+    +----------------------+
   0          32        64     0          32        64

2. Rotate back and then, clear the bits [0, MB)

      MB  MB2    ME2    ME        MB  MB2    ME2    ME
  +----------------------+    +----------------------+
  |0000001111111111111111| -> |0001111100000011111111+
  +----------------------+    +----------------------+
   0          32        64     0          32        64


https://reviews.llvm.org/D71893

Files:
  llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
  llvm/test/CodeGen/PowerPC/and-mask.ll

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