[llvm] fb0ccff - [SelectionDAG] Copy FP flags when visiting a binary instruction.

[Valentin Churavy via llvm-commits]

Author: Valentin Churavy
Date: 2019-12-22T14:29:36-05:00
New Revision: fb0ccff6e56bde6c42b2ff941861564e24a7a805

URL: https://github.com/llvm/llvm-project/commit/fb0ccff6e56bde6c42b2ff941861564e24a7a805
DIFF: https://github.com/llvm/llvm-project/commit/fb0ccff6e56bde6c42b2ff941861564e24a7a805.diff

LOG: [SelectionDAG] Copy FP flags when visiting a binary instruction.

Summary:
We noticed in Julia that the sequence below no longer turned into
a sequence of FMA instructions in LLVM 7+, but it did in LLVM 6.

```
    %29 = fmul contract <4 x double> %wide.load, %wide.load16
    %30 = fmul contract <4 x double> %wide.load13, %wide.load17
    %31 = fmul contract <4 x double> %wide.load14, %wide.load18
    %32 = fmul contract <4 x double> %wide.load15, %wide.load19
    %33 = fadd fast <4 x double> %vec.phi, %29
    %34 = fadd fast <4 x double> %vec.phi10, %30
    %35 = fadd fast <4 x double> %vec.phi11, %31
    %36 = fadd fast <4 x double> %vec.phi12, %32
```

Unlike Clang, Julia doesn't set the `unsafe-fp-math=true` function
attribute, but rather emits more local instruction flags.

This partially undoes https://reviews.llvm.org/D46854 and if required I can try to minimize the test further.

Reviewers: spatel, mcberg2017

Reviewed By: spatel

Subscribers: chriselrod, merge_guards_bot, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71495

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    llvm/test/CodeGen/X86/fmf-reduction.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index c69fe55a4f15..cdf4a2dac962 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -3124,6 +3124,13 @@ void SelectionDAGBuilder::visitBinary(const User &I, unsigned Opcode) {
   if (isVectorReductionOp(&I)) {
     Flags.setVectorReduction(true);
     LLVM_DEBUG(dbgs() << "Detected a reduction operation:" << I << "\n");
+
+    // If no flags are set we will propagate the incoming flags, if any flags
+    // are set, we will intersect them with the incoming flag and so we need to
+    // copy the FMF flags here.
+    if (auto *FPOp = dyn_cast<FPMathOperator>(&I)) {
+      Flags.copyFMF(*FPOp);
+    }
   }
 
   SDValue Op1 = getValue(I.getOperand(0));

diff  --git a/llvm/test/CodeGen/X86/fmf-reduction.ll b/llvm/test/CodeGen/X86/fmf-reduction.ll
index e959ef8fdba8..1d669d2a9242 100644
--- a/llvm/test/CodeGen/X86/fmf-reduction.ll
+++ b/llvm/test/CodeGen/X86/fmf-reduction.ll
@@ -1,14 +1,13 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-- -mattr=fma | FileCheck %s
 
-; FIXME: Propagation of IR FMF should not drop flags when adding the DAG reduction flag.
+; Propagation of IR FMF should not drop flags when adding the DAG reduction flag.
 ; This should include an FMA instruction, not separate FMUL/FADD.
 
 define double @julia_dotf(<4 x double> %x, <4 x double> %y, <4 x double> %z, i1 %t3) {
 ; CHECK-LABEL: julia_dotf:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vmulpd %ymm1, %ymm0, %ymm0
-; CHECK-NEXT:    vaddpd %ymm0, %ymm2, %ymm0
+; CHECK-NEXT:    vfmadd213pd {{.*#+}} ymm0 = (ymm1 * ymm0) + ymm2
 ; CHECK-NEXT:    vextractf128 $1, %ymm0, %xmm1
 ; CHECK-NEXT:    vaddpd %xmm1, %xmm0, %xmm0
 ; CHECK-NEXT:    vpermilpd {{.*#+}} xmm1 = xmm0[1,0]