[llvm] 86acaa9 - [DDG] Data Dependence Graph - Ordinals
Bardia Mahjour via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 19 07:57:58 PST 2019
Author: Bardia Mahjour
Date: 2019-12-19T10:57:33-05:00
New Revision: 86acaa9457d3957cbe303e1e801f1e727f66ca89
URL: https://github.com/llvm/llvm-project/commit/86acaa9457d3957cbe303e1e801f1e727f66ca89
DIFF: https://github.com/llvm/llvm-project/commit/86acaa9457d3957cbe303e1e801f1e727f66ca89.diff
LOG: [DDG] Data Dependence Graph - Ordinals
Summary:
This patch associates ordinal numbers to the DDG Nodes allowing
the builder to order nodes within a pi-block in program order. The
algorithm works by simply assuming the order in which the BBList
is fed into the builder. The builder already relies on the blocks being
in program order so that it can compute the dependencies correctly.
Similarly the order of instructions in their parent basic blocks
determine their program order.
Authored By: bmahjour
Reviewer: Meinersbur, fhahn, myhsu, xtian, dmgreen, kbarton, jdoerfert
Reviewed By: Meinersbur
Subscribers: ychen, arphaman, simoll, a.elovikov, mgorny, hiraditya, jfb, wuzish, llvm-commits, jsji, Whitney, etiotto, ppc-slack
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70986
Added:
Modified:
llvm/include/llvm/Analysis/DependenceGraphBuilder.h
llvm/lib/Analysis/DependenceGraphBuilder.cpp
llvm/test/Analysis/DDG/basic-a.ll
llvm/test/Analysis/DDG/basic-b.ll
llvm/test/Analysis/DDG/basic-loopnest.ll
Removed:
################################################################################
diff --git a/llvm/include/llvm/Analysis/DependenceGraphBuilder.h b/llvm/include/llvm/Analysis/DependenceGraphBuilder.h
index 99465ef39a07..08a13d967da2 100644
--- a/llvm/include/llvm/Analysis/DependenceGraphBuilder.h
+++ b/llvm/include/llvm/Analysis/DependenceGraphBuilder.h
@@ -54,6 +54,7 @@ template <class GraphType> class AbstractDependenceGraphBuilder {
/// therefore the worst-case time complexity is O(N^2). The average time
/// complexity is O((N^2)/2).
void populate() {
+ computeInstructionOrdinals();
createFineGrainedNodes();
createDefUseEdges();
createMemoryDependencyEdges();
@@ -62,6 +63,12 @@ template <class GraphType> class AbstractDependenceGraphBuilder {
sortNodesTopologically();
}
+ /// Compute ordinal numbers for each instruction and store them in a map for
+ /// future look up. These ordinals are used to compute node ordinals which are
+ /// in turn used to order nodes that are part of a cycle.
+ /// Instruction ordinals are assigned based on lexical program order.
+ void computeInstructionOrdinals();
+
/// Create fine grained nodes. These are typically atomic nodes that
/// consist of a single instruction.
void createFineGrainedNodes();
@@ -122,9 +129,27 @@ template <class GraphType> class AbstractDependenceGraphBuilder {
/// and false otherwise.
virtual bool shouldCreatePiBlocks() const { return true; }
+ /// Given an instruction \p I return its associated ordinal number.
+ size_t getOrdinal(Instruction &I) {
+ assert(InstOrdinalMap.find(&I) != InstOrdinalMap.end() &&
+ "No ordinal computed for this instruction.");
+ return InstOrdinalMap[&I];
+ }
+
+ /// Given a node \p N return its associated ordinal number.
+ size_t getOrdinal(NodeType &N) {
+ assert(NodeOrdinalMap.find(&N) != NodeOrdinalMap.end() &&
+ "No ordinal computed for this node.");
+ return NodeOrdinalMap[&N];
+ }
+
/// Map types to map instructions to nodes used when populating the graph.
using InstToNodeMap = DenseMap<Instruction *, NodeType *>;
+ /// Map Types to map instruction/nodes to an ordinal number.
+ using InstToOrdinalMap = DenseMap<Instruction *, size_t>;
+ using NodeToOrdinalMap = DenseMap<NodeType *, size_t>;
+
/// Reference to the graph that gets built by a concrete implementation of
/// this builder.
GraphType &Graph;
@@ -138,6 +163,14 @@ template <class GraphType> class AbstractDependenceGraphBuilder {
/// A mapping from instructions to the corresponding nodes in the graph.
InstToNodeMap IMap;
+
+ /// A mapping from each instruction to an ordinal number. This map is used to
+ /// populate the \p NodeOrdinalMap.
+ InstToOrdinalMap InstOrdinalMap;
+
+ /// A mapping from nodes to an ordinal number. This map is used to sort nodes
+ /// in a pi-block based on program order.
+ NodeToOrdinalMap NodeOrdinalMap;
};
} // namespace llvm
diff --git a/llvm/lib/Analysis/DependenceGraphBuilder.cpp b/llvm/lib/Analysis/DependenceGraphBuilder.cpp
index 98bb09d792b2..e8a1a2fff919 100644
--- a/llvm/lib/Analysis/DependenceGraphBuilder.cpp
+++ b/llvm/lib/Analysis/DependenceGraphBuilder.cpp
@@ -36,6 +36,15 @@ using InstructionListType = SmallVector<Instruction *, 2>;
// AbstractDependenceGraphBuilder implementation
//===--------------------------------------------------------------------===//
+template <class G>
+void AbstractDependenceGraphBuilder<G>::computeInstructionOrdinals() {
+ // The BBList is expected to be in program order.
+ size_t NextOrdinal = 1;
+ for (auto *BB : BBList)
+ for (auto &I : *BB)
+ InstOrdinalMap.insert(std::make_pair(&I, NextOrdinal++));
+}
+
template <class G>
void AbstractDependenceGraphBuilder<G>::createFineGrainedNodes() {
++TotalGraphs;
@@ -44,6 +53,7 @@ void AbstractDependenceGraphBuilder<G>::createFineGrainedNodes() {
for (Instruction &I : *BB) {
auto &NewNode = createFineGrainedNode(I);
IMap.insert(std::make_pair(&I, &NewNode));
+ NodeOrdinalMap.insert(std::make_pair(&NewNode, getOrdinal(I)));
++TotalFineGrainedNodes;
}
}
@@ -107,6 +117,13 @@ template <class G> void AbstractDependenceGraphBuilder<G>::createPiBlocks() {
LLVM_DEBUG(dbgs() << "Creating pi-block node with " << NL.size()
<< " nodes in it.\n");
+ // SCC iterator may put the nodes in an order that's
diff erent from the
+ // program order. To preserve original program order, we sort the list of
+ // nodes based on ordinal numbers computed earlier.
+ llvm::sort(NL, [&](NodeType *LHS, NodeType *RHS) {
+ return getOrdinal(*LHS) < getOrdinal(*RHS);
+ });
+
NodeType &PiNode = createPiBlock(NL);
++TotalPiBlockNodes;
@@ -200,6 +217,10 @@ template <class G> void AbstractDependenceGraphBuilder<G>::createPiBlocks() {
}
}
+ // Ordinal maps are no longer needed.
+ InstOrdinalMap.clear();
+ NodeOrdinalMap.clear();
+
LLVM_DEBUG(dbgs() << "==== End of Creation of Pi-Blocks ===\n");
}
diff --git a/llvm/test/Analysis/DDG/basic-a.ll b/llvm/test/Analysis/DDG/basic-a.ll
index a52e8c258f50..cebca668b2a9 100644
--- a/llvm/test/Analysis/DDG/basic-a.ll
+++ b/llvm/test/Analysis/DDG/basic-a.ll
@@ -4,65 +4,65 @@
; CHECK: Node Address:[[PI:0x[0-9a-f]*]]:pi-block
; CHECK-NEXT: --- start of nodes in pi-block ---
-; CHECK-NEXT: Node Address:[[N10:0x[0-9a-f]*]]:single-instruction
+; CHECK: Node Address:[[N1:0x[0-9a-f]*]]:single-instruction
; CHECK-NEXT: Instructions:
-; CHECK-NEXT: %inc = add i64 %i.02, 1
+; CHECK-NEXT: %i.02 = phi i64 [ %inc, %test1.for.body ], [ 0, %test1.for.body.preheader ]
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N11:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N2:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N11]]:single-instruction
+; CHECK: Node Address:[[N2]]:single-instruction
; CHECK-NEXT: Instructions:
-; CHECK-NEXT: %i.02 = phi i64 [ %inc, %test1.for.body ], [ 0, %test1.for.body.preheader ]
+; CHECK-NEXT: %inc = add i64 %i.02, 1
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N10]]
+; CHECK-NEXT: [def-use] to [[N1]]
; CHECK-NEXT: --- end of nodes in pi-block ---
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N1:0x[0-9a-f]*]]
-; CHECK-NEXT: [def-use] to [[N6:0x[0-9a-f]*]]
-; CHECK-NEXT: [def-use] to [[N7:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N3:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N4:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N5:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N7]]:single-instruction
+; CHECK: Node Address:[[N5]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %exitcond = icmp ne i64 %inc, %n
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N8:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N6:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N8]]:single-instruction
+; CHECK: Node Address:[[N6]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: br i1 %exitcond, label %test1.for.body, label %for.end.loopexit
; CHECK-NEXT: Edges:none!
-; CHECK: Node Address:[[N6]]:single-instruction
+; CHECK: Node Address:[[N4]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx1 = getelementptr inbounds float, float* %a, i64 %i.02
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N5:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N7:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N1]]:single-instruction
+; CHECK: Node Address:[[N3]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx = getelementptr inbounds float, float* %b, i64 %i.02
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N2:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N8:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N2]]:single-instruction
+; CHECK: Node Address:[[N8]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %0 = load float, float* %arrayidx, align 4
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N3:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N9:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N4:0x[0-9a-f]*]]:single-instruction
+; CHECK: Node Address:[[N10:0x[0-9a-f]*]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %conv = uitofp i64 %n to float
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N3]]
+; CHECK-NEXT: [def-use] to [[N9]]
-; CHECK: Node Address:[[N3]]:single-instruction
+; CHECK: Node Address:[[N9]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %add = fadd float %0, %conv
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N5]]
+; CHECK-NEXT: [def-use] to [[N7]]
-; CHECK: Node Address:[[N5]]:single-instruction
+; CHECK: Node Address:[[N7]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: store float %add, float* %arrayidx1, align 4
; CHECK-NEXT: Edges:none!
@@ -100,73 +100,73 @@ for.end: ; preds = %test1.for.body, %en
; CHECK: Node Address:[[PI:0x[0-9a-f]*]]:pi-block
; CHECK-NEXT: --- start of nodes in pi-block ---
-; CHECK: Node Address:[[N11:0x[0-9a-f]*]]:single-instruction
+; CHECK: Node Address:[[N1:0x[0-9a-f]*]]:single-instruction
; CHECK-NEXT: Instructions:
-; CHECK-NEXT: %inc = add i64 %i.02, 1
+; CHECK-NEXT: %i.02 = phi i64 [ %inc, %test2.for.body ], [ 0, %test2.for.body.preheader ]
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N12:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N2:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N12]]:single-instruction
+; CHECK: Node Address:[[N2]]:single-instruction
; CHECK-NEXT: Instructions:
-; CHECK-NEXT: %i.02 = phi i64 [ %inc, %test2.for.body ], [ 0, %test2.for.body.preheader ]
+; CHECK-NEXT: %inc = add i64 %i.02, 1
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N11]]
+; CHECK-NEXT: [def-use] to [[N1]]
; CHECK-NEXT: --- end of nodes in pi-block ---
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N1:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N3:0x[0-9a-f]*]]
; CHECK-NEXT: [def-use] to [[N4:0x[0-9a-f]*]]
-; CHECK-NEXT: [def-use] to [[N7:0x[0-9a-f]*]]
-; CHECK-NEXT: [def-use] to [[N8:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N5:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N6:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N8]]:single-instruction
+; CHECK: Node Address:[[N6]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %exitcond = icmp ne i64 %inc, %n
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N9:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N7:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N9]]:single-instruction
+; CHECK: Node Address:[[N7]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: br i1 %exitcond, label %test2.for.body, label %for.end.loopexit
; CHECK-NEXT: Edges:none!
-; CHECK: Node Address:[[N7]]:single-instruction
+; CHECK: Node Address:[[N5]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx2 = getelementptr inbounds float, float* %a, i64 %i.02
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N6:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N8:0x[0-9a-f]*]]
; CHECK: Node Address:[[N4]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx1 = getelementptr inbounds float, float* %a, i64 %i.02
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N5:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N9:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N5]]:single-instruction
+; CHECK: Node Address:[[N9]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %1 = load float, float* %arrayidx1, align 4
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N3:0x[0-9a-f]*]]
-; CHECK-NEXT: [memory] to [[N6]]
+; CHECK-NEXT: [def-use] to [[N20:0x[0-9a-f]*]]
+; CHECK-NEXT: [memory] to [[N8]]
-; CHECK: Node Address:[[N1]]:single-instruction
+; CHECK: Node Address:[[N3]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx = getelementptr inbounds float, float* %b, i64 %i.02
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N2:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N10:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N2]]:single-instruction
+; CHECK: Node Address:[[N10]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %0 = load float, float* %arrayidx, align 4
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N3]]
+; CHECK-NEXT: [def-use] to [[N20]]
-; CHECK: Node Address:[[N3]]:single-instruction
+; CHECK: Node Address:[[N20]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %add = fadd float %0, %1
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N6]]
+; CHECK-NEXT: [def-use] to [[N8]]
-; CHECK: Node Address:[[N6]]:single-instruction
+; CHECK: Node Address:[[N8]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: store float %add, float* %arrayidx2, align 4
; CHECK-NEXT: Edges:none!
diff --git a/llvm/test/Analysis/DDG/basic-b.ll b/llvm/test/Analysis/DDG/basic-b.ll
index 757c706193a5..50803d466fec 100644
--- a/llvm/test/Analysis/DDG/basic-b.ll
+++ b/llvm/test/Analysis/DDG/basic-b.ll
@@ -2,23 +2,23 @@
; CHECK-LABEL: 'DDG' for loop 'test1.for.body':
-; CHECK: Node Address:[[N9:0x[0-9a-f]*]]:pi-block
+; CHECK: Node Address:[[N1:0x[0-9a-f]*]]:pi-block
; CHECK-NEXT:--- start of nodes in pi-block ---
-; CHECK: Node Address:[[N13:0x[0-9a-f]*]]:single-instruction
+; CHECK: Node Address:[[N2:0x[0-9a-f]*]]:single-instruction
; CHECK-NEXT: Instructions:
-; CHECK-NEXT: %inc = add i64 %i.02, 1
+; CHECK-NEXT: %i.02 = phi i64 [ %inc, %test1.for.body ], [ 1, %test1.for.body.preheader ]
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N14:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N3:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N14]]:single-instruction
+; CHECK: Node Address:[[N3]]:single-instruction
; CHECK-NEXT: Instructions:
-; CHECK-NEXT: %i.02 = phi i64 [ %inc, %test1.for.body ], [ 1, %test1.for.body.preheader ]
+; CHECK-NEXT: %inc = add i64 %i.02, 1
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N13]]
+; CHECK-NEXT: [def-use] to [[N2]]
; CHECK-NEXT:--- end of nodes in pi-block ---
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N1:0x[0-9a-f]*]]
; CHECK-NEXT: [def-use] to [[N4:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N5:0x[0-9a-f]*]]
; CHECK-NEXT: [def-use] to [[N6:0x[0-9a-f]*]]
; CHECK-NEXT: [def-use] to [[N7:0x[0-9a-f]*]]
@@ -37,47 +37,47 @@
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx3 = getelementptr inbounds float, float* %a, i64 %i.02
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N3:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N9:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N4]]:single-instruction
+; CHECK: Node Address:[[N5]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %sub1 = add i64 %i.02, -1
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N5:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N10:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N5]]:single-instruction
+; CHECK: Node Address:[[N10]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx2 = getelementptr inbounds float, float* %a, i64 %sub1
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N3]]
+; CHECK-NEXT: [def-use] to [[N9]]
-; CHECK: Node Address:[[N1]]:single-instruction
+; CHECK: Node Address:[[N4]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx = getelementptr inbounds float, float* %b, i64 %i.02
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N2:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N11:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N2]]:single-instruction
+; CHECK: Node Address:[[N11]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %0 = load float, float* %arrayidx, align 4
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N3]]
+; CHECK-NEXT: [def-use] to [[N9]]
-; CHECK: Node Address:[[N3]]:pi-block
+; CHECK: Node Address:[[N9]]:pi-block
; CHECK-NEXT: --- start of nodes in pi-block ---
-; CHECK: Node Address:[[N10:0x[0-9a-f]*]]:single-instruction
+; CHECK: Node Address:[[N12:0x[0-9a-f]*]]:single-instruction
; CHECK-NEXT: Instructions:
-; CHECK-NEXT: %add = fadd float %0, %1
+; CHECK-NEXT: %1 = load float, float* %arrayidx2, align 4
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N11:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N13:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N12:0x[0-9a-f]*]]:single-instruction
+; CHECK: Node Address:[[N13]]:single-instruction
; CHECK-NEXT: Instructions:
-; CHECK-NEXT: %1 = load float, float* %arrayidx2, align 4
+; CHECK-NEXT: %add = fadd float %0, %1
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N10]]
+; CHECK-NEXT: [def-use] to [[N14:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N11]]:single-instruction
+; CHECK: Node Address:[[N14]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: store float %add, float* %arrayidx3, align 4
; CHECK-NEXT: Edges:
@@ -120,82 +120,83 @@ for.end: ; preds = %test1.for.body, %en
; CHECK-LABEL: 'DDG' for loop 'test2.for.body':
-; CHECK: Node Address:[[N11:0x[0-9a-f]*]]:pi-block
+; CHECK: Node Address:[[N1:0x[0-9a-f]*]]:pi-block
; CHECK-NEXT:--- start of nodes in pi-block ---
-; CHECK: Node Address:[[N12:0x[0-9a-f]*]]:single-instruction
+
+; CHECK: Node Address:[[N2:0x[0-9a-f]*]]:single-instruction
; CHECK-NEXT: Instructions:
-; CHECK-NEXT: %inc = add i64 %i.02, 1
+; CHECK-NEXT: %i.02 = phi i64 [ %inc, %test2.for.body ], [ 1, %test2.for.body.preheader ]
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N13:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N3:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N13]]:single-instruction
+; CHECK: Node Address:[[N3]]:single-instruction
; CHECK-NEXT: Instructions:
-; CHECK-NEXT: %i.02 = phi i64 [ %inc, %test2.for.body ], [ 1, %test2.for.body.preheader ]
+; CHECK-NEXT: %inc = add i64 %i.02, 1
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N12]]
+; CHECK-NEXT: [def-use] to [[N2]]
; CHECK-NEXT:--- end of nodes in pi-block ---
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N1:0x[0-9a-f]*]]
; CHECK-NEXT: [def-use] to [[N4:0x[0-9a-f]*]]
-; CHECK-NEXT: [def-use] to [[N8:0x[0-9a-f]*]]
-; CHECK-NEXT: [def-use] to [[N9:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N5:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N6:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N7:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N9]]:single-instruction
+; CHECK: Node Address:[[N7]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %cmp = icmp ult i64 %inc, %sub
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N10:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N8:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N10]]:single-instruction
+; CHECK: Node Address:[[N8]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: br i1 %cmp, label %test2.for.body, label %for.end.loopexit
; CHECK-NEXT: Edges:none!
-; CHECK: Node Address:[[N8]]:single-instruction
+; CHECK: Node Address:[[N6]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx3 = getelementptr inbounds float, float* %a, i64 %i.02
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N7:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N9:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N4]]:single-instruction
+; CHECK: Node Address:[[N5]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %add1 = add i64 %i.02, 1
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N5:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N10:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N5]]:single-instruction
+; CHECK: Node Address:[[N10]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx2 = getelementptr inbounds float, float* %a, i64 %add1
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N6:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N11:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N6]]:single-instruction
+; CHECK: Node Address:[[N11]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %1 = load float, float* %arrayidx2, align 4
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N3:0x[0-9a-f]*]]
-; CHECK-NEXT: [memory] to [[N7]]
+; CHECK-NEXT: [def-use] to [[N12:0x[0-9a-f]*]]
+; CHECK-NEXT: [memory] to [[N9]]
-; CHECK: Node Address:[[N1]]:single-instruction
+; CHECK: Node Address:[[N4]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx = getelementptr inbounds float, float* %b, i64 %i.02
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N2:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N13:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N2]]:single-instruction
+; CHECK: Node Address:[[N13]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %0 = load float, float* %arrayidx, align 4
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N3]]
+; CHECK-NEXT: [def-use] to [[N12]]
-; CHECK: Node Address:[[N3]]:single-instruction
+; CHECK: Node Address:[[N12]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %add = fadd float %0, %1
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N7]]
+; CHECK-NEXT: [def-use] to [[N9]]
-; CHECK: Node Address:[[N7]]:single-instruction
+; CHECK: Node Address:[[N9]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: store float %add, float* %arrayidx3, align 4
; CHECK-NEXT: Edges:none!
diff --git a/llvm/test/Analysis/DDG/basic-loopnest.ll b/llvm/test/Analysis/DDG/basic-loopnest.ll
index 41c2cbbdc7a1..3581c7a68aa6 100644
--- a/llvm/test/Analysis/DDG/basic-loopnest.ll
+++ b/llvm/test/Analysis/DDG/basic-loopnest.ll
@@ -3,59 +3,59 @@
; CHECK-LABEL: 'DDG' for loop 'test1.for.cond1.preheader':
-; CHECK: Node Address:[[N28:0x[0-9a-f]*]]:pi-block
+; CHECK: Node Address:[[N1:0x[0-9a-f]*]]:pi-block
; CHECK-NEXT:--- start of nodes in pi-block ---
-; CHECK: Node Address:[[N29:0x[0-9a-f]*]]:single-instruction
+; CHECK: Node Address:[[N2:0x[0-9a-f]*]]:single-instruction
; CHECK-NEXT: Instructions:
-; CHECK-NEXT: %inc = add i64 %j.02, 1
+; CHECK-NEXT: %j.02 = phi i64 [ %inc, %for.body4 ], [ 1, %for.body4.preheader ]
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N30:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N3:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N30]]:single-instruction
+; CHECK: Node Address:[[N3]]:single-instruction
; CHECK-NEXT: Instructions:
-; CHECK-NEXT: %j.02 = phi i64 [ %inc, %for.body4 ], [ 1, %for.body4.preheader ]
+; CHECK-NEXT: %inc = add i64 %j.02, 1
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N29]]
+; CHECK-NEXT: [def-use] to [[N2]]
; CHECK-NEXT:--- end of nodes in pi-block ---
; CHECK-NEXT: Edges:
+; CHECK-NEXT: [def-use] to [[N4:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N5:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N6:0x[0-9a-f]*]]
; CHECK-NEXT: [def-use] to [[N7:0x[0-9a-f]*]]
-; CHECK-NEXT: [def-use] to [[N13:0x[0-9a-f]*]]
-; CHECK-NEXT: [def-use] to [[N16:0x[0-9a-f]*]]
-; CHECK-NEXT: [def-use] to [[N2:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N13]]:single-instruction
+; CHECK: Node Address:[[N5]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %sub7 = add i64 %j.02, -1
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N12:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N8:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N25:0x[0-9a-f]*]]:pi-block
+; CHECK: Node Address:[[N9:0x[0-9a-f]*]]:pi-block
; CHECK-NEXT:--- start of nodes in pi-block ---
-; CHECK: Node Address:[[N26:0x[0-9a-f]*]]:single-instruction
+; CHECK: Node Address:[[N10:0x[0-9a-f]*]]:single-instruction
; CHECK-NEXT: Instructions:
-; CHECK-NEXT: %inc13 = add i64 %i.04, 1
+; CHECK-NEXT: %i.04 = phi i64 [ %inc13, %for.inc12 ], [ 0, %test1.for.cond1.preheader.preheader ]
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N27:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N11:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N27]]:single-instruction
+; CHECK: Node Address:[[N11]]:single-instruction
; CHECK-NEXT: Instructions:
-; CHECK-NEXT: %i.04 = phi i64 [ %inc13, %for.inc12 ], [ 0, %test1.for.cond1.preheader.preheader ]
+; CHECK-NEXT: %inc13 = add i64 %i.04, 1
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N26]]
+; CHECK-NEXT: [def-use] to [[N10]]
; CHECK-NEXT:--- end of nodes in pi-block ---
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N5:0x[0-9a-f]*]]
-; CHECK-NEXT: [def-use] to [[N10:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N12:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N13:0x[0-9a-f]*]]
; CHECK-NEXT: [def-use] to [[N14:0x[0-9a-f]*]]
-; CHECK-NEXT: [def-use] to [[N18:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N15:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N18]]:single-instruction
+; CHECK: Node Address:[[N15]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %exitcond = icmp ne i64 %inc13, %n
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N19:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N16:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N19]]:single-instruction
+; CHECK: Node Address:[[N16]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: br i1 %exitcond, label %test1.for.cond1.preheader, label %for.end14.loopexit
; CHECK-NEXT: Edges:none!
@@ -64,119 +64,119 @@
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %4 = mul nsw i64 %i.04, %n
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N15:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N17:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N15]]:single-instruction
+; CHECK: Node Address:[[N17]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx10 = getelementptr inbounds float, float* %a, i64 %4
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N16]]
+; CHECK-NEXT: [def-use] to [[N6]]
-; CHECK: Node Address:[[N16]]:single-instruction
+; CHECK: Node Address:[[N6]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx11 = getelementptr inbounds float, float* %arrayidx10, i64 %j.02
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N9:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N18:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N10]]:single-instruction
+; CHECK: Node Address:[[N13]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %2 = mul nsw i64 %i.04, %n
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N11:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N19:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N11]]:single-instruction
+; CHECK: Node Address:[[N19]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx6 = getelementptr inbounds float, float* %a, i64 %2
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N12]]
+; CHECK-NEXT: [def-use] to [[N8]]
-; CHECK: Node Address:[[N12]]:single-instruction
+; CHECK: Node Address:[[N8]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx8 = getelementptr inbounds float, float* %arrayidx6, i64 %sub7
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N9]]
+; CHECK-NEXT: [def-use] to [[N18]]
-; CHECK: Node Address:[[N5]]:single-instruction
+; CHECK: Node Address:[[N12]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %0 = mul nsw i64 %i.04, %n
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N6:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N20:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N6]]:single-instruction
+; CHECK: Node Address:[[N20]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx = getelementptr inbounds float, float* %b, i64 %0
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N7]]
+; CHECK-NEXT: [def-use] to [[N4]]
-; CHECK: Node Address:[[N7]]:single-instruction
+; CHECK: Node Address:[[N4]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx5 = getelementptr inbounds float, float* %arrayidx, i64 %j.02
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N8:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N21:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N8]]:single-instruction
+; CHECK: Node Address:[[N21]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %1 = load float, float* %arrayidx5, align 4
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N9]]
+; CHECK-NEXT: [def-use] to [[N18]]
-; CHECK: Node Address:[[N9]]:pi-block
+; CHECK: Node Address:[[N18]]:pi-block
; CHECK-NEXT:--- start of nodes in pi-block ---
; CHECK: Node Address:[[N22:0x[0-9a-f]*]]:single-instruction
; CHECK-NEXT: Instructions:
-; CHECK-NEXT: %add = fadd float %1, %3
+; CHECK-NEXT: %3 = load float, float* %arrayidx8, align 4
; CHECK-NEXT: Edges:
; CHECK-NEXT: [def-use] to [[N23:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N24:0x[0-9a-f]*]]:single-instruction
+; CHECK: Node Address:[[N23]]:single-instruction
; CHECK-NEXT: Instructions:
-; CHECK-NEXT: %3 = load float, float* %arrayidx8, align 4
+; CHECK-NEXT: %add = fadd float %1, %3
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N22]]
+; CHECK-NEXT: [def-use] to [[N24:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N23]]:single-instruction
+; CHECK: Node Address:[[N24]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: store float %add, float* %arrayidx11, align 4
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [memory] to [[N24]]
+; CHECK-NEXT: [memory] to [[N22]]
; CHECK-NEXT:--- end of nodes in pi-block ---
; CHECK-NEXT: Edges:none!
-; CHECK: Node Address:[[N21:0x[0-9a-f]*]]:single-instruction
+; CHECK: Node Address:[[N25:0x[0-9a-f]*]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: br label %for.inc12
; CHECK-NEXT: Edges:none!
-; CHECK: Node Address:[[N20:0x[0-9a-f]*]]:single-instruction
+; CHECK: Node Address:[[N26:0x[0-9a-f]*]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: br label %for.body4
; CHECK-NEXT: Edges:none!
-; CHECK: Node Address:[[N1:0x[0-9a-f]*]]:single-instruction
+; CHECK: Node Address:[[N27:0x[0-9a-f]*]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %sub = add i64 %n, -1
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N2]]
-; CHECK-NEXT: [def-use] to [[N3:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N7]]
+; CHECK-NEXT: [def-use] to [[N28:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N3]]:single-instruction
+; CHECK: Node Address:[[N28]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %cmp21 = icmp ult i64 1, %sub
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N4:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N29:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N4]]:single-instruction
+; CHECK: Node Address:[[N29]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: br i1 %cmp21, label %for.body4.preheader, label %for.inc12
; CHECK-NEXT: Edges:none!
-; CHECK: Node Address:[[N2]]:single-instruction
+; CHECK: Node Address:[[N7]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %cmp2 = icmp ult i64 %inc, %sub
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N17:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N30:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N17]]:single-instruction
+; CHECK: Node Address:[[N30]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: br i1 %cmp2, label %for.body4, label %for.inc12.loopexit
; CHECK-NEXT: Edges:none!
@@ -235,135 +235,135 @@ for.end14: ; preds = %for.inc12, %entry
; CHECK: Node Address:[[PI1:0x[0-9a-f]*]]:pi-block
; CHECK-NEXT:--- start of nodes in pi-block ---
-; CHECK: Node Address:[[N28:0x[0-9a-f]*]]:single-instruction
+; CHECK: Node Address:[[N1:0x[0-9a-f]*]]:single-instruction
; CHECK-NEXT: Instructions:
-; CHECK-NEXT: %inc = add i64 %j.02, 1
+; CHECK-NEXT: %j.02 = phi i64 [ %inc, %for.body4 ], [ 1, %for.body4.preheader ]
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N29:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N2:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N29]]:single-instruction
+; CHECK: Node Address:[[N2]]:single-instruction
; CHECK-NEXT: Instructions:
-; CHECK-NEXT: %j.02 = phi i64 [ %inc, %for.body4 ], [ 1, %for.body4.preheader ]
+; CHECK-NEXT: %inc = add i64 %j.02, 1
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N28]]
+; CHECK-NEXT: [def-use] to [[N1]]
; CHECK-NEXT:--- end of nodes in pi-block ---
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N7:0x[0-9a-f]*]]
-; CHECK-NEXT: [def-use] to [[N13:0x[0-9a-f]*]]
-; CHECK-NEXT: [def-use] to [[N18:0x[0-9a-f]*]]
-; CHECK-NEXT: [def-use] to [[N2:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N3:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N4:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N5:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N6:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N13]]:single-instruction
+; CHECK: Node Address:[[N4]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %add7 = add i64 %j.02, 1
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N12:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N7:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N24:0x[0-9a-f]*]]:pi-block
+; CHECK: Node Address:[[N8:0x[0-9a-f]*]]:pi-block
; CHECK-NEXT:--- start of nodes in pi-block ---
-; CHECK: Node Address:[[N25:0x[0-9a-f]*]]:single-instruction
+; CHECK: Node Address:[[N9:0x[0-9a-f]*]]:single-instruction
; CHECK-NEXT: Instructions:
-; CHECK-NEXT: %inc13 = add i64 %i.04, 1
+; CHECK-NEXT: %i.04 = phi i64 [ %inc13, %for.inc12 ], [ 0, %test2.for.cond1.preheader.preheader ]
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N26:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N10:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N26]]:single-instruction
+; CHECK: Node Address:[[N10]]:single-instruction
; CHECK-NEXT: Instructions:
-; CHECK-NEXT: %i.04 = phi i64 [ %inc13, %for.inc12 ], [ 0, %test2.for.cond1.preheader.preheader ]
+; CHECK-NEXT: %inc13 = add i64 %i.04, 1
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N25]]
+; CHECK-NEXT: [def-use] to [[N9]]
; CHECK-NEXT:--- end of nodes in pi-block ---
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N5:0x[0-9a-f]*]]
-; CHECK-NEXT: [def-use] to [[N10:0x[0-9a-f]*]]
-; CHECK-NEXT: [def-use] to [[N16:0x[0-9a-f]*]]
-; CHECK-NEXT: [def-use] to [[N20:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N11:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N12:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N13:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N14:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N20]]:single-instruction
+; CHECK: Node Address:[[N14]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %exitcond = icmp ne i64 %inc13, %n
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N21:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N15:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N21]]:single-instruction
+; CHECK: Node Address:[[N15]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: br i1 %exitcond, label %test2.for.cond1.preheader, label %for.end14.loopexit
; CHECK-NEXT: Edges:none!
-; CHECK: Node Address:[[N16]]:single-instruction
+; CHECK: Node Address:[[N13]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %4 = mul nsw i64 %i.04, %n
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N17:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N16:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N17]]:single-instruction
+; CHECK: Node Address:[[N16]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx10 = getelementptr inbounds float, float* %a, i64 %4
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N18]]
+; CHECK-NEXT: [def-use] to [[N5]]
-; CHECK: Node Address:[[N18]]:single-instruction
+; CHECK: Node Address:[[N5]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx11 = getelementptr inbounds float, float* %arrayidx10, i64 %j.02
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N15:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N17:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N10]]:single-instruction
+; CHECK: Node Address:[[N12]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %2 = mul nsw i64 %i.04, %n
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N11:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N18:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N11]]:single-instruction
+; CHECK: Node Address:[[N18]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx6 = getelementptr inbounds float, float* %a, i64 %2
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N12]]
+; CHECK-NEXT: [def-use] to [[N7]]
-; CHECK: Node Address:[[N12]]:single-instruction
+; CHECK: Node Address:[[N7]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx8 = getelementptr inbounds float, float* %arrayidx6, i64 %add7
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N14:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N19:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N14]]:single-instruction
+; CHECK: Node Address:[[N19]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %3 = load float, float* %arrayidx8, align 4
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N9:0x[0-9a-f]*]]
-; CHECK-NEXT: [memory] to [[N15]]
+; CHECK-NEXT: [def-use] to [[N20:0x[0-9a-f]*]]
+; CHECK-NEXT: [memory] to [[N17]]
-; CHECK: Node Address:[[N5]]:single-instruction
+; CHECK: Node Address:[[N11]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %0 = mul nsw i64 %i.04, %n
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N6:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N21:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N6]]:single-instruction
+; CHECK: Node Address:[[N21]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx = getelementptr inbounds float, float* %b, i64 %0
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N7]]
+; CHECK-NEXT: [def-use] to [[N3]]
-; CHECK: Node Address:[[N7]]:single-instruction
+; CHECK: Node Address:[[N3]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %arrayidx5 = getelementptr inbounds float, float* %arrayidx, i64 %j.02
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N8:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N22:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N8]]:single-instruction
+; CHECK: Node Address:[[N22]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %1 = load float, float* %arrayidx5, align 4
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N9]]
+; CHECK-NEXT: [def-use] to [[N20]]
-; CHECK: Node Address:[[N9]]:single-instruction
+; CHECK: Node Address:[[N20]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %add = fadd float %1, %3
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N15]]
+; CHECK-NEXT: [def-use] to [[N17]]
-; CHECK: Node Address:[[N15]]:single-instruction
+; CHECK: Node Address:[[N17]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: store float %add, float* %arrayidx11, align 4
; CHECK-NEXT: Edges:none!
@@ -373,36 +373,36 @@ for.end14: ; preds = %for.inc12, %entry
; CHECK-NEXT: br label %for.inc12
; CHECK-NEXT: Edges:none!
-; CHECK: Node Address:[[N22:0x[0-9a-f]*]]:single-instruction
+; CHECK: Node Address:[[N24:0x[0-9a-f]*]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: br label %for.body4
; CHECK-NEXT: Edges:none!
-; CHECK: Node Address:[[N1:0x[0-9a-f]*]]:single-instruction
+; CHECK: Node Address:[[N25:0x[0-9a-f]*]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %sub = add i64 %n, -1
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N2]]
-; CHECK-NEXT: [def-use] to [[N3:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N6]]
+; CHECK-NEXT: [def-use] to [[N26:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N3]]:single-instruction
+; CHECK: Node Address:[[N26]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %cmp21 = icmp ult i64 1, %sub
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N4:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N27:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N4]]:single-instruction
+; CHECK: Node Address:[[N27]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: br i1 %cmp21, label %for.body4.preheader, label %for.inc12
; CHECK-NEXT: Edges:none!
-; CHECK: Node Address:[[N2]]:single-instruction
+; CHECK: Node Address:[[N6]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: %cmp2 = icmp ult i64 %inc, %sub
; CHECK-NEXT: Edges:
-; CHECK-NEXT: [def-use] to [[N19:0x[0-9a-f]*]]
+; CHECK-NEXT: [def-use] to [[N28:0x[0-9a-f]*]]
-; CHECK: Node Address:[[N19]]:single-instruction
+; CHECK: Node Address:[[N28]]:single-instruction
; CHECK-NEXT: Instructions:
; CHECK-NEXT: br i1 %cmp2, label %for.body4, label %for.inc12.loopexit
; CHECK-NEXT: Edges:none!
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