[PATCH] D71701: [AArch64] Peephole optimization. Merge AND and TST instructions

[Pavel Kosov via Phabricator via llvm-commits]

kpdev42 created this revision.
kpdev42 added reviewers: eli.friedman, t.p.northover, bmakam, reames.
kpdev42 added a project: LLVM.
Herald added subscribers: llvm-commits, hiraditya, kristof.beyls.

In some cases Clang does not perform merging of instructions AND and TST
This patch adds such merge if next conditions are satisfied:

1. AND and TST are in same BB
2. AND and TST use the same operands
3. Conditional flags are not used between AND and ANDS

Short discussion on mailing list
http://llvm.1065342.n5.nabble.com/llvm-dev-ARM-Peephole-optimization-instructions-tst-add-tp133109.html


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D71701

Files:
  llvm/include/llvm/CodeGen/TargetInstrInfo.h
  llvm/lib/CodeGen/PeepholeOptimizer.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.h
  llvm/test/CodeGen/AArch64/peephole-and-tst.ll

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