[PATCH] D71589: [PowerPC] Adding a match pattern to recognize the and mask with RLWINM8

[qshanz via Phabricator via llvm-commits]

steven.zhang created this revision.
steven.zhang added reviewers: hfinkel, nemanjai, jsji, PowerPC.
Herald added subscribers: shchenz, wuzish, kbarton, hiraditya.
Herald added a project: LLVM.

This is the motivate case:

  define i32 @foo1(i32 %x) {
  entry:
    %and = and i32 %x, -2
    ret i32 %and
  }

PowerPC has several mechanism(tryBitPermutation() and custom select for AND/OR etc) to generate the bit operation better with the combination of AND/OR/XOR etc. This case isn't handled by these mechanism. So, I added a match pattern in the td to do the final selection, though, technical speaking, we could extend those mechanism to handle this case also.


https://reviews.llvm.org/D71589

Files:
  llvm/lib/Target/PowerPC/PPCInstr64Bit.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/test/CodeGen/PowerPC/2016-04-17-combine.ll
  llvm/test/CodeGen/PowerPC/cmpb.ll
  llvm/test/CodeGen/PowerPC/setcc-logic.ll
  llvm/test/CodeGen/PowerPC/shift_mask.ll

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