[PATCH] D71500: [WebAssembly] Replace SIMD int min/max builtins with patterns

[Heejin Ahn via Phabricator via llvm-commits]

aheejin accepted this revision.
aheejin added inline comments.
This revision is now accepted and ready to land.


================
Comment at: llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp:189
+          setOperationAction(Op, T, Legal);
+    }
+
----------------
Just curious, what gets assigned we don't do this? I thought the default value was `Legal`..


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71500/new/

https://reviews.llvm.org/D71500