[PATCH] D71370: [AArch64][SVE] Add integer arithmetic with immediate instructions.

Danilo Carvalho Grael via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 11 14:29:33 PST 2019


dancgr marked 5 inline comments as done.
dancgr added inline comments.


================
Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:1050
+                [LLVMMatchType<0>,
+                 llvm_anyint_ty],
+                [IntrNoMem]>;
----------------
efriedma wrote:
> Missing ImmArg marking.  Second arg should be llvm_i32_ty.
Updated that.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:2832
+    case MVT::i16:
+      // i16 values get sign-extended during lowering, so need to check for
+      // "negative" values when shifting.
----------------
efriedma wrote:
> Sign-extended where, exactly?  I don't see any reason to allow `@llvm.aarch64.sve.uqsub.imm.nxv8i16(<vscale x 8 x i16> %a, i32 -256)`
That makes sense. We don't have negative immediates for the AddSub, so it should be the same as i32 and i64. Will updated in the next patch.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71370/new/

https://reviews.llvm.org/D71370





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