[PATCH] D71359: [PATCH] Fix assertion failure in getMemOperandWithOffsetWidth

Kristof Beyls via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 11 07:13:21 PST 2019


kristof.beyls created this revision.
kristof.beyls added reviewers: thegameg, sdesmalen, t.p.northover.
Herald added subscribers: luismarques, apazos, sameer.abuasal, pzheng, s.egerton, lenary, jsji, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, MaskRay, jrtc27, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, kbarton, hiraditya, nhaehnle, jvesely, nemanjai, arsenm.
Herald added a project: LLVM.

This fixes an assertion failure that triggers inside
getMemOperandWithOffset when Machine Sinking calls it on a MachineInstr
that is not a memory operation.

Different backends implement getMemOperandWithOffset differently: some
return false on non-memory MachineInstrs, others assert.

The Machine Sinking pass in at least SinkingPreventsImplicitNullCheck
relies on getMemOperandWithOffset to return false on non-memory
MachineInstrs, instead of asserting.

This patch updates the documentation on getMemOperandWithOffset that it
should return false on any MachineInstr it cannot handle, instead of
asserting. It also adapts the in-tree backends accordingly where
necessary.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D71359

Files:
  llvm/include/llvm/CodeGen/TargetInstrInfo.h
  llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
  llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
  llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
  llvm/lib/Target/X86/X86InstrInfo.cpp
  llvm/test/CodeGen/AArch64/machine-sink-getmemoperandwithoffset.mir

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