[PATCH] D70945: Handle BUNDLE instructions in MipsAsmPrinter

[Phabricator via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGb5f69e234ef0: Handle BUNDLE instructions in MipsAsmPrinter (authored by Alex Richardson <Alexander.Richardson at cl.cam.ac.uk>).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70945/new/

https://reviews.llvm.org/D70945

Files:
  llvm/lib/Target/Mips/MipsAsmPrinter.cpp
  llvm/test/CodeGen/Mips/delay-slot-filler-bundled-insts.mir


Index: llvm/test/CodeGen/Mips/delay-slot-filler-bundled-insts.mir
===================================================================
--- llvm/test/CodeGen/Mips/delay-slot-filler-bundled-insts.mir
+++ llvm/test/CodeGen/Mips/delay-slot-filler-bundled-insts.mir
@@ -2,6 +2,17 @@
 ## Check that the delay-slot filler does not attempt to split BUNDLE instructions
 # RUN: llc %s -start-before=mips-delay-slot-filler -stop-after=mips-delay-slot-filler \
 # RUN:   -verify-machineinstrs -o - | FileCheck %s
+## Check that we can emit assembly for input with BUNDLE instructions:
+# RUN: llc %s -start-before=mips-delay-slot-filler -verify-machineinstrs -o - | FileCheck %s -check-prefix ASM
+
+# ASM:  # %bb.0:
+# ASM-NEXT: daddiu	$sp, $sp, -16
+# ASM-NEXT: sd	$ra, 8($sp)
+## BUNDLE should be emitted in order:
+# ASM-NEXT: daddiu	$sp, $sp, -16
+# ASM-NEXT: daddiu	$sp, $sp, 16
+# ASM-NEXT: beqz	$4, .LBB0_2
+# ASM-NEXT: nop
 --- |
   target datalayout = "E-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128"
   target triple = "mips64-unknown-freebsd"
Index: llvm/lib/Target/Mips/MipsAsmPrinter.cpp
===================================================================
--- llvm/lib/Target/Mips/MipsAsmPrinter.cpp
+++ llvm/lib/Target/Mips/MipsAsmPrinter.cpp
@@ -257,6 +257,10 @@
     if (emitPseudoExpansionLowering(*OutStreamer, &*I))
       continue;
 
+    // Skip the BUNDLE pseudo instruction and lower the contents
+    if (I->isBundle())
+      continue;
+
     if (I->getOpcode() == Mips::PseudoReturn ||
         I->getOpcode() == Mips::PseudoReturn64 ||
         I->getOpcode() == Mips::PseudoIndirectBranch ||


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