[PATCH] D54749: Saturating float to int casts: Basics [1/n]

Ayke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 3 11:38:29 PST 2019


aykevl added a comment.

For what it's worth, RISC-V implements semantics close to but not exactly like ARM, with NaN being treated as if it was +Infinity.
Source: https://content.riscv.org/wp-content/uploads/2017/05/riscv-spec-v2.2.pdf#page=63

(Also, I need these intrinsics as well for a Go compiler).


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D54749/new/

https://reviews.llvm.org/D54749





More information about the llvm-commits mailing list