[PATCH] D70874: [X86] Add initialization of MXCSR in llvm-exegesis

Clement Courbet via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 2 00:15:33 PST 2019


courbet accepted this revision.
courbet added a comment.
This revision is now accepted and ready to land.

In D70874#1764446 <https://reviews.llvm.org/D70874#1764446>, @craig.topper wrote:

> I'm not sure I understand why this needs to be initialized. Why don't we need to do it for FPCW?


We make sure that every register that is used by an instruction in the snippet is initialized. This is to avoid having fluctuations in measurements due to performance depending on values in registers. I think it's great if SSE/AVX instructions start explicitly state their deps on MXCSR, because the behaviour does indeed depend on the value of these flags.

Regarding whether masking instruction is the right thing to do: Yes for now, because this will ensure that these instructions will at least pass, but on the other hand that might not be perfectly representative of the real performance characteristics. AFAICT @gchatelet still wants to work on value constraints & exploration.

So this looks good to me if Craig has no other remarks.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70874/new/

https://reviews.llvm.org/D70874





More information about the llvm-commits mailing list