[PATCH] D70813: [AArch64][v8.3a] Don't emit LDRA '[xN]!' alias in disassembly.

[Simon Tatham via Phabricator via llvm-commits]

simon_tatham created this revision.
simon_tatham added reviewers: ab, ostannard.
Herald added subscribers: llvm-commits, hiraditya, kristof.beyls.
Herald added a project: LLVM.

In rG643ac6c0420b <https://reviews.llvm.org/rG643ac6c0420b70571ef0fc0f65ab66e736eea225>, the syntax `ldraa x1, [x0]!` was added as an alias
for `ldraa x1, [x0, #0]!`. That syntax is less obvious in meaning, and
also will not be accepted by assemblers that haven't been updated yet.
So it would be better not to emit it as the preferred disassembly for
that instruction.

This change lowers the EmitPriority of the new alias so that the more
explicit syntax `[x0, #0]!` is preferred by the disassembler. The new
syntax is still accepted by the assembler.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D70813

Files:
  llvm/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/test/MC/AArch64/armv8.3a-signed-pointer.s
  llvm/test/MC/Disassembler/AArch64/armv8.3a-signed-pointer.txt


Index: llvm/test/MC/Disassembler/AArch64/armv8.3a-signed-pointer.txt
===================================================================
--- llvm/test/MC/Disassembler/AArch64/armv8.3a-signed-pointer.txt
+++ llvm/test/MC/Disassembler/AArch64/armv8.3a-signed-pointer.txt
@@ -114,7 +114,7 @@
 [0x20,0x04,0x20,0xf8]
 [0x20,0x04,0xa0,0xf8]
 
-# CHECK: ldraa x0, [x1]!
-# CHECK: ldrab x0, [x1]!
+# CHECK: ldraa x0, [x1, #0]!
+# CHECK: ldrab x0, [x1, #0]!
 [0x20,0x0c,0x20,0xf8]
 [0x20,0x0c,0xa0,0xf8]
Index: llvm/test/MC/AArch64/armv8.3a-signed-pointer.s
===================================================================
--- llvm/test/MC/AArch64/armv8.3a-signed-pointer.s
+++ llvm/test/MC/AArch64/armv8.3a-signed-pointer.s
@@ -307,10 +307,10 @@
 // CHECK-REQ: error: instruction requires: pa
 // CHECK-REQ-NEXT:  ldrab x0, [x1]
   ldraa x0, [x1]!
-// CHECK-NEXT: ldraa x0, [x1]!  // encoding: [0x20,0x0c,0x20,0xf8]
+// CHECK-NEXT: ldraa x0, [x1, #0]!  // encoding: [0x20,0x0c,0x20,0xf8]
 // CHECK-REQ: error: instruction requires: pa
 // CHECK-REQ-NEXT:  ldraa x0, [x1]!
   ldrab x0, [x1]!
-// CHECK-NEXT: ldrab x0, [x1]!  // encoding: [0x20,0x0c,0xa0,0xf8]
+// CHECK-NEXT: ldrab x0, [x1, #0]!  // encoding: [0x20,0x0c,0xa0,0xf8]
 // CHECK-REQ: error: instruction requires: pa
 // CHECK-REQ-NEXT:  ldrab x0, [x1]!
Index: llvm/lib/Target/AArch64/AArch64InstrFormats.td
===================================================================
--- llvm/lib/Target/AArch64/AArch64InstrFormats.td
+++ llvm/lib/Target/AArch64/AArch64InstrFormats.td
@@ -1473,7 +1473,7 @@
                   (!cast<Instruction>(NAME # "indexed") GPR64:$Rt, GPR64sp:$Rn, 0)>;
 
   def : InstAlias<asm # "\t$Rt, [$wback]!",
-                  (!cast<Instruction>(NAME # "writeback") GPR64sp:$wback, GPR64:$Rt, 0)>;
+                  (!cast<Instruction>(NAME # "writeback") GPR64sp:$wback, GPR64:$Rt, 0), 0>;
 }
 
 //---


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