[PATCH] D70431: [DebugInfo] Make describeLoadedValue() reg aware

[Djordje Todorovic via Phabricator via llvm-commits]

djtodoro added inline comments.


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Comment at: llvm/include/llvm/CodeGen/TargetInstrInfo.h:960
   /// If the specific machine instruction is an instruction that adds an
-  /// immediate value to its source operand and stores it in destination,
-  /// return destination and source registers as machine operands along with
-  /// \c Offset which has been added.
-  virtual Optional<DestSourcePair> isAddImmediate(const MachineInstr &MI,
-                                                  int64_t &Offset) const {
+  /// immediate value and a physical register and stores the result in
+  /// the given physical register \c Reg, return a pair of the source
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djtodoro wrote:
> `and a physical register and stores, and stores the`
`and a physical register and stores` ==> `and a physical register, and stores the`


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70431/new/

https://reviews.llvm.org/D70431