[PATCH] D70795: [AArch64][SVE] Add intrinsics and patterns for logical predicate instructions

[Danilo Carvalho Grael via Phabricator via llvm-commits]

dancgr created this revision.
dancgr added reviewers: sdesmalen, kmclaughlin, rengolin, huntergr, mgudim, efriedma, amehsan.
Herald added subscribers: llvm-commits, psnobl, rkruppe, hiraditya, kristof.beyls, tschuett.
Herald added a project: LLVM.

Add instrinics and patters for the following logical predicate instructions:

- and, ands, bic, bics, eor, eors
- sel
- orr, orrs, orn, orns, nor, nors, nand, nads


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D70795

Files:
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/test/CodeGen/AArch64/sve-pred-log.ll

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