[PATCH] D69956: [AArch64][SVE] Integer reduction instructions pattern/intrinsics.

Danilo Carvalho Grael via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 26 11:26:40 PST 2019


dancgr updated this revision to Diff 231113.
dancgr marked 2 inline comments as done.
dancgr added a comment.

I think I have addressed all of the comments from the reviewers on this patch. This way we don't have any new legal type and I embedded the insert_subreg in the helper pattern.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D69956/new/

https://reviews.llvm.org/D69956

Files:
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/test/CodeGen/AArch64/sve-int-reduce-pred.ll

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