[PATCH] D70223: [DAGCombine] Split vector load-update-store into single element stores

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

It looks like this is missing some checks on the load.  The code needs to check that the load and store target the same address, and that there aren't any operations between the load and the store that could modify the memory.

The profitability check probably needs to weigh the cost of the memory operations a little more carefully in cases where the total number of memory operations increases.

I'm a little worried there could be a performance penalty on certain CPUs if the vector value is loaded soon afterwards, due to the partial overlap.  Depends on details of the specific CPU, though, and maybe it's rare enough that it doesn't matter.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70223/new/

https://reviews.llvm.org/D70223