[PATCH] D70542: [AArch64][SVE] Add intrinsics for gather loads with 64-bit offsets

[Andrzej Warzynski via Phabricator via llvm-commits]

andwar marked 2 inline comments as done.
andwar added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:1154
 
+  /* multiclass ldff1_gather<Instruction I, ValueType Ty, SDPatternOperator Load, ValueType PredTy, ComplexPattern AddrCP, ValueType MemVT> { */
+  /*     // base + index */
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I missed this, sorry! I will remove it in the next patch.


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Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:5554
+  let hasSideEffects = 1, hasNoSchedulingInfo = 1 in {
+  def "" : Pseudo<(outs Z_d:$Zt), (ins PPR3bAny:$Pg, GPR64sp:$Rn, ZPR64ExtLSL8:$Zm), []>,
+           PseudoInstExpansion<(!cast<Instruction>(NAME # _REAL) Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, ZPR64ExtLSL8:$Zm)>;
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This `Pseudo` is not needed. I will remove it in the next patch.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D70542/new/

https://reviews.llvm.org/D70542