[PATCH] D69723: [RISCV] Fix wrong CFI directives

[Hsiangkai Wang via Phabricator via llvm-commits]

HsiangKai added inline comments.


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Comment at: llvm/test/DebugInfo/RISCV/relax-debug-frame.ll:15
 ; RELAX-NOT: {{[}]}}
-; RELAX: 0x25 R_RISCV_SET6
-; RELAX: 0x25 R_RISCV_SUB6
+; RELAX: 0x39 R_RISCV_SET6
+; RELAX: 0x39 R_RISCV_SUB6
----------------
luismarques wrote:
> shiva0217 wrote:
> > I think it might a reasonable changing. According to https://github.com/riscv/riscv-binutils-gdb/blob/riscv-binutils-2.29/gas/config/tc-riscv.c#L1940, R_RISCV_SET6 and R_RISCV_SUB6 are relocation types for DW_CFA_advance_loc. It seems that the check line didn't show all the relocation types of the object, the number of the reduction of R_RISCV_SET6 and R_RISCV_SUB6 reflect the reduction of the CFI directives.
> Thanks, that's exactly the kind of reassuring feedback I was looking for! :-)
@shiva0217 is right. In DWARF definition, DW_CFA_advance_loc's operand is 6-bits width offset. These two relocation types are for 6-bits offset. These two relocation types should be similar to R_RISCV_ADD32 and R_RISCV_SUB32 besides the data width.


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  https://reviews.llvm.org/D69723/new/

https://reviews.llvm.org/D69723