[PATCH] D64630: [DebugInfo] Address performance regression with r364515

Jeremy Morse via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 18 12:57:49 PST 2019


jmorse marked an inline comment as done.
jmorse added inline comments.


================
Comment at: llvm/lib/CodeGen/RegisterCoalescer.cpp:3338
   // If the Reg is live all the way through this block, no non-live DBG_VALUEs
-  // can be merged with the live range of Other. Exit early.
+  // can be merged with the live range of the other. Exit early.
   if (RegLivenessIt != RegLiveness.end() &&
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vsk wrote:
> IIUC there's no need to check for the case where Reg is live & OtherLiveness is not, because makeDeadDbgValsUndef is called once for each vreg in a coalesce pair. (Assuming that's correct) maybe that's worth a comment here, or in the function doc.
For completeness: the original intention here / site of this comment, was to detect an early exit. The assumption was that the register coalescer doesn't merge overlapping live ranges; and so if a block was completely covered by a live range, we could assume no invalid coalescing could occur.

Digging into that however, it turns out the coalescer really does merge overlapping live ranges, which is great! But not for this implementation. New one up in a few moments; alas it's another redo :/


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