[PATCH] D69982: PPC: Prepare tests for switch of default denormal-fp-math

[Sanjay Patel via Phabricator via llvm-commits]

spatel added a subscriber: steven.zhang.
spatel added a comment.

In D69982#1746885 <https://reviews.llvm.org/D69982#1746885>, @arsenm wrote:

> In D69982#1746873 <https://reviews.llvm.org/D69982#1746873>, @steven.zhang wrote:
>
> > Well, it seems that it is still too early to review this change. One comments: I see that, we have the code sequence change if switch to ieee. sqrt_afn_ieee is slower than sqrt_afn.  As you are trying to set it as ieee for target that didn't explicit set the denormal-fp-math, which means that, this will affect PowerPC. Could we have the Frontend set the denormal-fp-math for PowerPC as non-ieee, so that, you don't need this patch any more ?
>
>
> Based on the comments in bug 34994, the current behavior is broken on PowerPC. Denormals are enabled by default, so the sqrt expansion is broken. It would be incorrect to default to non-ieee


Bugzilla appears to be dead currently, so I can't check exactly what was written there, but that's what I remember too.
Note that PowerISA rev 2.07 (not sure what current state is) has a bit in the FPSCR that is likely relevant:

  Bit 61 - Floating-Point Non-IEEE Mode (NI)
  Programming Note:
  When the processor is in floating-point non-IEEE mode, the results of floating-point
  operations may be approximate, and performance for these operations may be better, 
  more predictable, or less data-dependent than when the processor is not in non-IEEE 
  mode. For example, in non-IEEE mode an implementation may return 0 instead of a 
  denormalized number, and may return a large number instead of an infinity.

I have no idea if/how any recent PPC implementation makes uses of that bit. And I don't know if any compiler sets that bit using tricks (like x86 might).


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