[PATCH] D68857: [X86] Add strict fp support for operations of X87 instructions

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/test/CodeGen/X86/fp-strict-scalar.ll:23
 
-define x86_regcallcc double @f1(double %a, double %b) #0 {
-; SSE-LABEL: f1:
+define x86_regcallcc double @fadd1(double %a, double %b) #0 {
+; SSE-LABEL: fadd1:
----------------
How about fadd_f64 and fadd_f32 instead of fadd1/fadd2?


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Comment at: llvm/test/CodeGen/X86/fp80-strict-scalar.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=CHECK,SSE-X86
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=CHECK,SSE-64
----------------
I don't think we need to test all these combinations. But if you want to keep them, I suggest adding a CHECK-X86 and CHECK-X64 prefix so that we get more commonality.


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Comment at: llvm/test/CodeGen/X86/fp80-strict-scalar.ll:22
+
+define x86_regcallcc x86_fp80 @fadd1(x86_fp80 %a, x86_fp80 %b) #0 {
+; SSE-X86-LABEL: fadd1:
----------------
fadd_f80


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Comment at: llvm/test/CodeGen/X86/fp80-strict-scalar.ll:166
+
+define x86_regcallcc void @fpext1(float* %val, x86_fp80* %ret) #0 {
+; SSE-X86-LABEL: fpext1:
----------------
fpext_f32_to_f80


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68857/new/

https://reviews.llvm.org/D68857