[PATCH] D69956: [AArch64][SVE] Integer reduction instructions pattern/intrinsics.

[Danilo Carvalho Grael via Phabricator via llvm-commits]

dancgr added inline comments.


================
Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:843
+
+class AdvSIMD_Pred1VectorArg_Intrinsic
+    : Intrinsic<[llvm_anyvector_ty],
----------------
efriedma wrote:
> Did you mean to include this in this patch?
Actually no, that is for a different thing. I will be removing this.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D69956/new/

https://reviews.llvm.org/D69956