[PATCH] D69741: [Codegen] Both sides of '&&' are same; fixed

Krzysztof Parzyszek via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 7 08:46:16 PST 2019


kparzysz added inline comments.


================
Comment at: llvm/utils/TableGen/CodeGenDAGPatterns.cpp:482
 
-    if (any_of(S, isIntegerOrPtr) && any_of(S, isIntegerOrPtr)) {
+    if (any_of(S, isIntegerOrPtr) && any_of(B, isIntegerOrPtr)) {
       auto NotInt = [](MVT VT) { return !isIntegerOrPtr(VT); };
----------------
simoncook wrote:
> I'm not familiar with this part of TableGen, but trying to narrow down what about RISCV causes this issue, it seems that patterns that have `sext_inreg` nodes cause this infinite loop, whereby this comparison now fails, and we fall into line 490 and remove modes.
> 
> Reading the comment above, it reads to me like this comparison should instead be if either S or B contains an integer mode, rather than if both do? If I change both this and line 486 to `||` rather than `&&` in addition to this change then the infinite loop disappears. I ran `make check-llvm` with that change, and I don't see any regression tests failing.
The intent was what this change shows, i.e. `if S contains an integer && B contains an integer)`.  I don't know what's causing the timeouts, but IIRC the code at lines 505-509 used to cause some weirdness on X86 (it's been fixed since).  Without knowing how the timeouts occur there isn't much that can be done.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D69741/new/

https://reviews.llvm.org/D69741





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