[PATCH] D69791: [ARM,MVE] Add intrinsics for gather/scatter load/stores.

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


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Comment at: clang/include/clang/Basic/arm_mve_defs.td:175
 
+// CopyKind<s,k> expects t and u to be scalars. It returns a scalar
+// whose kind (signed, unsigned or float) matches that of k, and whose
----------------
Should the t and u be s and k?


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Comment at: clang/test/CodeGen/arm-mve-intrinsics/scatter-gather.c:2
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple thumbv8.1m.main-arm-none-eabi -target-feature +mve.fp -mfloat-abi hard -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
+
----------------
-DPOLYMORPHIC line


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Comment at: llvm/include/llvm/IR/IntrinsicsARM.td:815
 
-def int_arm_mve_vcvt_narrow: Intrinsic<[llvm_v8f16_ty],
-   [llvm_v8f16_ty, llvm_v4f32_ty, llvm_i32_ty], [IntrNoMem]>;
-def int_arm_mve_vcvt_narrow_predicated: Intrinsic<[llvm_v8f16_ty],
-   [llvm_v8f16_ty, llvm_v4f32_ty, llvm_i32_ty, llvm_v4i1_ty], [IntrNoMem]>;
+multiclass MVEPredicated<list<LLVMType> rets, list<LLVMType> params,
+                         LLVMType pred, list<IntrinsicProperty> props = []> {
----------------
This looks useful.


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Comment at: llvm/lib/Target/ARM/ARMInstrMVE.td:308
+  // The number of bits in a vector element, in integer form.
+  int LaneBits = !shl(8, Size);
+
----------------
Very nice. Like it.


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Comment at: llvm/lib/Target/ARM/ARMInstrMVE.td:4671
+  foreach VTI = VTIs in
+  foreach UnsignedFlag = !if(!eq(VTI.Size, memsz.encoding),
+                             [0,1], [VTI.Unsigned]) in {
----------------
Is UnsignedFlag used here, in the scatters?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D69791/new/

https://reviews.llvm.org/D69791