[PATCH] D69288: [GISel][ArtifactCombiner] Relax the constraint to combine unmerge with concat_vectors

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 4 09:22:10 PST 2019


arsenm added a comment.

Are you planning on fixing the regression in the near future? If so splitting the patches this way seems fine



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Comment at: test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir:230
+    ; CHECK: [[TRUNC:%[0-9]+]]:_(<4 x s1>) = G_TRUNC [[CONCAT_VECTORS]](<4 x s32>)
+    ; CHECK: [[UV:%[0-9]+]]:_(s1), [[UV1:%[0-9]+]]:_(s1), [[UV2:%[0-9]+]]:_(s1), [[UV3:%[0-9]+]]:_(s1) = G_UNMERGE_VALUES [[TRUNC]](<4 x s1>)
+    ; CHECK: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[UV]](s1)
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This is definitely worse since unmerge to s1 should be illegal, although it's possible the rules aren't properly defined here


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Comment at: test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir:320
+    ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s64>) = G_CONCAT_VECTORS [[COPY]](<2 x s64>), [[COPY1]](<2 x s64>)
+    ; CHECK: [[TRUNC:%[0-9]+]]:_(<4 x s32>) = G_TRUNC [[CONCAT_VECTORS]](<4 x s64>)
+    ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[TRUNC]](<4 x s32>)
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This is worse because the truncates need to be scalarized


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Comment at: test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir:501
+---
+name: test_unmerge_values_s128_of_zext_of_concat_vectors
+body:             |
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Test name doesn't quite match, I see no s128


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D69288/new/

https://reviews.llvm.org/D69288





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