[PATCH] D68360: PR41162 Implement LKK remainder and divisibility algorithms [urem]

[Tim Gymnich via Phabricator via llvm-commits]

TG908 added a comment.

I am still looking for a better solution for checking if the types are legal and the optimization can be applied. 
Right now I get an integer type VT for the rem operation and I check if a type twice as wide (FVT) is legal.

  // Check to see if we can do this.
   if (IsAfterLegalization && !isTypeLegal(FVT))
     return SDValue();

On RISCV the first iteration of a 32 bit rem operation will not cause an optimization. After the next round of legalization the operations gets expanded to 64 bit and the the optimization gets applied.
Checking for both VT and FVT at the same time doesn't work since RISCV only has i64 and not i32. Thus VT and FVT are never legal at the same time.

Can I leave it like this and rely on the legalization phase to take care of it or should I handle the case explicitly where VT and FVT are not legal at the same time by expanding VT to the size of FVT manually?

   // Check to see if we can do this.
    if (IsAfterLegalization && !isTypeLegal(FVT)) {
      return SDValue();
  } else if isTypeLegal(FVT) {
     VT = FVT;
     ...
  }
  ...


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  https://reviews.llvm.org/D68360/new/

https://reviews.llvm.org/D68360