[llvm] 42d7746 - [MachineBasicBlock] Skip over debug instructions in computeRegisterLiveness before checking for begin

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2019-11-01T14:43:17-07:00
New Revision: 42d77461f3298d5b7bf09208d67a3d8bb28df065

URL: https://github.com/llvm/llvm-project/commit/42d77461f3298d5b7bf09208d67a3d8bb28df065
DIFF: https://github.com/llvm/llvm-project/commit/42d77461f3298d5b7bf09208d67a3d8bb28df065.diff

LOG: [MachineBasicBlock] Skip over debug instructions in computeRegisterLiveness before checking for begin

If there are debug instructions before the stopping point,
we need to skip over them before checking for begin in order
to avoid having the debug instructions effect behavior.

Fixes PR43758.

Differential Revision: https://reviews.llvm.org/D69606

Added: 
    

Modified: 
    llvm/lib/CodeGen/MachineBasicBlock.cpp
    llvm/test/CodeGen/X86/leaFixup64.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp
index 854bef3aab05..71354ea43453 100644
--- a/llvm/lib/CodeGen/MachineBasicBlock.cpp
+++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp
@@ -1462,6 +1462,11 @@ MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI,
     } while (I != begin() && N > 0);
   }
 
+  // If all the instructions before this in the block are debug instructions,
+  // skip over them.
+  while (I != begin() && std::prev(I)->isDebugInstr())
+    --I;
+
   // Did we get to the start of the block?
   if (I == begin()) {
     // If so, the register's state is definitely defined by the live-in state.

diff  --git a/llvm/test/CodeGen/X86/leaFixup64.mir b/llvm/test/CodeGen/X86/leaFixup64.mir
index 931a57205796..673d43ea71a1 100644
--- a/llvm/test/CodeGen/X86/leaFixup64.mir
+++ b/llvm/test/CodeGen/X86/leaFixup64.mir
@@ -1169,7 +1169,7 @@ body:             |
     ; CHECK: NOOP
     ; CHECK: NOOP
     ; CHECK: NOOP
-    ; CHECK: $ebp = LEA64_32r killed $rbp, 1, killed $rax, 0, $noreg
+    ; CHECK: $ebp = ADD32rr $ebp, $eax, implicit-def $eflags, implicit $rbp, implicit $rax
     ; CHECK: NOOP
     ; CHECK: NOOP
     ; CHECK: NOOP