[PATCH] D67722: [PowerPC] Remove redundant CRSET/CRUNSET in custom lowering of known CR bit spills

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai accepted this revision.
nemanjai added a comment.
This revision is now accepted and ready to land.

LGTM. Feel free to address the comments on the commit.



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Comment at: llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp:165
+      if (skipFunction(MF.getFunction()) || !RunPreEmitPeephole) {
+        // Remove UNENCODED_NOP even with -ppc-late-peephole=false
+        SmallVector<MachineInstr *, 4> InstrsToErase;
----------------
Nit: Expand this comment to:
```
// Remove UNENCODED_NOP even when this pass is disabled.
// This needs to be done unconditionally so we don't emit zeros
// in the instruction stream.
```


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Comment at: llvm/test/CodeGen/PowerPC/knowCRBitSpill.ll:6
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:     -ppc-late-peephole=false -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s
 
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Please add `--implicit-check-not=creqv --implicit-check-not=crxor` as we want to make sure we don't emit the CRSET/CRUNSET.


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  https://reviews.llvm.org/D67722/new/

https://reviews.llvm.org/D67722