[PATCH] D69609: [TargetLowering][DAGCombine][MSP430] Shift Amount Threshold in DAGCombine (Baseline)

Wed Oct 30 09:43:41 PDT 2019

spatel added a comment.

In D69609#1727234 <https://reviews.llvm.org/D69609#1727234>, @joanlluch wrote:

> In D69609#1726965 <https://reviews.llvm.org/D69609#1726965>, @spatel wrote:
>
> > LGTM - have you requested/acquired commit privilege yet?
>
>
> No, I don't have or requested it. I don't really plan to become a long term contributor of LLVM patches, so I'm unsure if I actually need it. I'm happy by posting my proposals and allow regular members to review and commit the changes.

At this point, you have had at least 3 patches accepted, so you should request that permission. It is more work for me to commit for you, and it is slower for you.

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Comment at: llvm/test/CodeGen/MSP430/shift-amount-threshold.ll:147
+; select C, 16, 0 -> shl C, 4
+define i16 @testSiymplifySelectCC_1(i16 %a, i16 %b) {
+; CHECK-LABEL: testSiymplifySelectCC_1:
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joanlluch wrote:
> spatel wrote:
> > Test name got garbled.
> Hi @spatel, I'm not English native, don't know what "garbled" means in this context. Please can you elaborate?. Is there something I need to do?. 
> I changed the name of this test case compared with my previous commit to match the LLVM function that is responsible for the transformation. Thanks  
I meant the spelling was wrong:
testSiymplifySelectCC_1 --> testSimplifySelectCC_1

Repository:
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  https://reviews.llvm.org/D69609/new/

https://reviews.llvm.org/D69609